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MCP1825S-3302E

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Microchip Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP1825S-3302E

Microchip Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-3

MCP1825S-3302E from Microchip Tech, in a SOT-223-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Connect the unregulated or regulated input voltage source to VIN, with an input capacitor of 1 µF to 10 µF recommended for most applications.
2 GND power_in Connect GND to a quiet circuit ground, since it conducts only the quiescent current (typically 120 µA) and should be tied to the output capacitor return in noisy or switching-input applications.
3 VOUT power_out Regulated output voltage of the LDO, which requires a minimum output capacitance of 1.0 µF for stability.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOT-223-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Operating Voltage VIN 2.1 6 V Note 1 7
Input Quiescent Current Iq 120 220 µA IL = 0 mA, VOUT = 0.8V to 5.0V 7
Maximum Output Current IOUT 500 mA VIN = 2.1V to 6.0V; VR = 0.8V to 5.0V, Note 1 7
Line Regulation ΔVOUT/(VOUT x ΔVIN) -0.16 0.05 0.16 %/V (Note 1) ≤ VIN ≤ 6V 7
Load Regulation ΔVOUT/VOUT -1 0.5 1 % IOUT = 1 mA to 500 mA, (Note 4) 7
Voltage Regulation (fixed output, % of VR) VOUT -2.5 0.5 2.5 % Percent of VR (3.3V nominal for this part), Note 2 7
Dropout Voltage VDROPOUT 210 350 mV Note 5, IOUT = 500 mA, VIN(MIN) = 2.1V 8
Operating Junction Temperature Range TJ -40 125 °C Steady State 10
Maximum Junction Temperature TJ 150 °C Transient 10
Storage Temperature Range TA -65 150 °C 10
ESD protection, HBM 4 kV All pins (HBM/MM) 7
ESD protection, MM 300 V All pins (HBM/MM) 7
Output capacitance (ceramic, stable range) 1 22 µF Minimum for stability; maximum recommended 17
Output capacitor ESR (electrolytic) ESR 1 ohm Electrolytic output capacitor, no greater than 17
Input capacitance 1 4.7 µF Recommended for most applications 18
Thermal Resistance, 3LD SOT-223, junction to ambient θJA 62 °C/W EIA/JEDEC JESD51-751-7, 4 Layer Board 10
Thermal Resistance, 3LD SOT-223, junction to case θJC 15 °C/W 10

CAD (KiCad official)

  • Symbol: MCP1825S-3302E
  • Footprint: Package_TO_SOT_SMD:SOT-223-3_TabPin2
  • 3D model: SOT-223-3 (KiCad packages3D, STEP)
  • 3D model files: mcp1825s-3302e-etched.step / mcp1825s-3302e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp1825s-3302e.step / mcp1825s-3302e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (38 pp, sha256 078c84d2df9d4861, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF