component
MCP1755T-3302E
Public Made by Adomby adom
Microchip Tech Power Management - Specialized, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP1755T-3302E
Microchip Tech · Power Management - Specialized · SOT-23-5
MCP1755T-3302E from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated supply input, specified from 3.6V to 16.0V; low source impedance is needed for stable operation, and about 1 µF of capacitance is sufficient for most applications. |
| 2 | GND | power_in | Regulator ground that is tied to the negative side of the input and output capacitors and carries only the LDO bias current, with voltage drops to the load minimized. |
| 3 | SHDN | input | Shutdown input where a logic-high enables the LDO output and a logic-low disables it, also driving PWRGD low and placing the LDO in a low quiescent current shutdown state. |
| 4 | PWRGD | output | Open-drain power good output that goes active when VOUT is within 92% (typical) of nominal, with 2% typical hysteresis and a 100 µs (typical) power-up delay, and may be pulled up to VIN or VOUT. |
| 5 | VOUT | power_out | Regulated voltage output that connects to the load and the positive side of the output capacitor, which should be placed as close to this pin as practical, and carries the DC load current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Operating Voltage | VIN | 3.6 | 16 | V | 6 | ||
| Maximum Output Current | IOUT_mA | 300 | mA | 6 | |||
| Input Quiescent Current for SHDN Mode | ISHDN | 0.1 | 4 | µA | SHDN = GND | 6 | |
| Output Voltage Regulation | VOUT | -2 | 0.85 | 2 | % | Note 2 | 6 |
| Line Regulation | VOUT/(VOUT x VIN) | -0.05 | 0.01 | 0.05 | %/V | VR + 1V <= VIN <= 16V | 6 |
| Load Regulation | VOUT/VOUT | -0.5 | 0.1 | 0.5 | % | IL = 1.0 mA to 300 mA (Note 4) | 6 |
| Dropout Voltage | VDROPOUT | 300 | 500 | mV | IL = 300 mA | 6 | |
| Dropout Current | IDO | 75 | 120 | µA | VIN = 0.95 VR, IOUT = 0 mA | 6 | |
| Logic High Input (SHDN) | VSHDN-HIGH | 2.4 | V | 6 | |||
| Logic Low Input (SHDN) | VSHDN-LOW | 0 | 0.8 | V | 6 | ||
| Shutdown Input Leakage Current | SHDNILK | 0.02 | 0.2 | µA | SHDN = 16V | 6 | |
| PWRGD Input Voltage Operating Range | VPWRGD_VIN | 1.7 | V | ISINK = 1 mA | 6 | ||
| PWRGD Threshold Voltage (referenced to VOUT) | VPWRGD_TH | 90 | 92 | 94 | %VOUT | Falling edge of VOUT | 6 |
| PWRGD Output Voltage Low | VPWRGD_L | 0.2 | 0.45 | V | IPWRGD_SINK = 5.0 mA, VOUT = 0V | 7 | |
| PWRGD Output Sink Current | IPWRGD_L | 5 | mA | VPWRGD <= 0.45V | 7 | ||
| PWRGD Leakage Current | IPWRGD_LK | 50 | 200 | nA | VPWRGD pull-up = 10 k to VIN, VIN = 16V | 7 | |
| Power Supply Ripple Rejection Ratio | PSRR | 80 | dB | VR = 5V, f = 1 kHz, IL = 100 mA, VINAC = 1VPK-PK, CIN = 0 µF, VIN >= VR + 1.5V >= 3.6V | 8 | ||
| Specified Temperature Range | TA | -40 | 125 | °C | 8 | ||
| Operating Temperature Range | TJ | -40 | 150 | °C | 8 | ||
| Storage Temperature Range | TA | -55 | 150 | °C | 5 | ||
| Maximum Junction Temperature | 165 | °C | Note 7 | 5 | |||
| Input Voltage | VIN | 17.6 | V | 5 | |||
| VOUT pin voltage | VOUT | 5.5 | V | 5 | |||
| ESD Protection on All Pins (HBM) | 3 | kV | HBM | 5 | |||
| ESD Protection on All Pins (MM) | 400 | V | MM | 5 | |||
| Thermal Resistance, SOT-23-5, junction to ambient | JA | 256 | °C/W | SOT-23-5 package | 8 | ||
| Thermal Resistance, SOT-23-5, junction to case | JC | 81 | °C/W | SOT-23-5 package | 8 |
CAD (KiCad official)
- Symbol:
MCP1755T-3302E - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mcp1755t-3302e-etched.step/mcp1755t-3302e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1755t-3302e.step/mcp1755t-3302e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (42 pp, sha256
4868d8c139ed953b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).