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Ray Publish 0.1.0 d3e7d13 17d ago
{
  "slug": "mcp1725-3302e",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "mcp1725-3302e",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "mcp1725-3302e.kicad_sym",
    "mcp1725-3302e.kicad_mod",
    "mcp1725-3302e.glb",
    "mcp1725-3302e.step",
    "mcp1725-3302e.lbr",
    "docs/hero.png",
    "docs/mcp1725-3302e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "mcp1725-3302e-hero.glb",
    "mcp1725-3302e-hero.overlay.json",
    "mcp1725-3302e-etched.glb"
  ],
  "component": {
    "mpn": "MCP1725-3302E",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882539661938688",
    "parts": {
      "symbol": "mcp1725-3302e.kicad_sym",
      "footprint": "mcp1725-3302e.kicad_mod",
      "model_3d": "mcp1725-3302e-hero.glb",
      "model_3d_plain": "mcp1725-3302e-etched.glb",
      "model_3d_step": "mcp1725-3302e-etched.step",
      "model_3d_step_plain": "mcp1725-3302e.step",
      "lbr": "mcp1725-3302e.lbr"
    },
    "distributor_links": {
      "lcsc": "C185568"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T06:56:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VIN",
        "type": "power_in",
        "description": "Input voltage supply; the datasheet gives an input operating range of 2.3V to 6.0V and recommends an input capacitor of 1 µF to 10 µF when the source is remote or a battery."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Second input voltage supply pin, listed in the pin table as Input Voltage Supply with the same 2.3V to 6.0V operating input range."
      },
      {
        "number": "3",
        "name": "SHDN",
        "type": "input",
        "description": "Active-low shutdown control: a logic-high enables the LDO output and a logic-low disables it, which also drives PWRGD low and puts the LDO into a typical 0.1 µA quiescent shutdown state."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection to a quiet circuit ground, which only carries the LDO quiescent current (typically 120 µA) and should return to the output capacitor return for noisy or switching inputs."
      },
      {
        "number": "5",
        "name": "PWRGD",
        "type": "output",
        "description": "Open-drain power good output that indicates the LDO output is within 92% (typical) of its nominal regulation value, with about 2% typical hysteresis, and is delayed on power-up by the CDELAY setting (200 µs typical with no CDELAY capacitor)."
      },
      {
        "number": "6",
        "name": "CDELAY",
        "type": "input",
        "description": "Power good delay set-point input where an external capacitor to ground sets the PWRGD power-up delay from 200 µs (no capacitance) to 300 ms (0.1 µF)."
      },
      {
        "number": "7",
        "name": "Sense",
        "type": "input",
        "description": "Output voltage feedback input for the fixed-voltage version that compensates for voltage drops from packaging and board layout to improve load regulation."
      },
      {
        "number": "8",
        "name": "VOUT",
        "type": "power_out",
        "description": "Regulated output voltage of the LDO, which requires a minimum output capacitance of 1.0 µF for stability (ceramic, tantalum or aluminum-electrolytic)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pinout is the Fixed Output column of the SOIC-8 pin table on page 14 (pin 7 is Sense; the adjustable"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0392,
        "at": "2026-10-18T06:56:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882539661938688",
        "pages": 32,
        "sha256": "280bae2ee8a97ab3",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "mcp1725-3302e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "mcp1725-3302e-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5ee41f04fae042bcb208f7d9457d603b00a04491aa263dd735125efa5c95dc24",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}