component
MCP1700T-5002E
Public Made by Adomby adom
Microchip Tech Linear Voltage Regulators (LDO), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP1700T-5002E
Microchip Tech · Linear Voltage Regulators (LDO) · SOT-23
MCP1700T-5002E from Microchip Tech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Regulator ground, tied to the negative side of the output and input capacitors, carrying only the 1.6 µA typical LDO bias current, and it is the reference for output regulation. |
| 2 | VOUT | power_out | Regulated voltage output, connected to the positive side of the load and output capacitor (1 µF stable), carrying the DC load current up to 250 mA for VOUT ≥ 2.5V. |
| 3 | VIN | power_in | Unregulated supply input accepting 2.3V to 6.0V, needing low source impedance with typically 1 µF of input capacitance for stable operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23 |
| Category | Power Management ICs |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Operating Voltage | VIN | 2.3 | 6 | V | Note 1 | 3 | |
| Input Quiescent Current | Iq | 1.6 | 4 | µA | IL = 0 mA, VIN = VR + 1V | 3 | |
| Maximum Output Current | IOUT_mA | 250 | mA | For VR ≥ 2.5V | 3 | ||
| Output Short Circuit Current | IOUT_SC | 408 | mA | VIN = VR + 1V, VOUT = GND; peak current measured 10 ms after short is applied | 3 | ||
| Output Voltage Regulation (25°C) | VOUT | -2 | 0.4 | 2 | % | Note 2; relative to VR; typ ±0.4% | 3 |
| Output Voltage Regulation (TJ -40 to +125°C) | VOUT | -3 | 3 | % | Note 2; boldface, TJ -40°C to +125°C; relative to VR | 3 | |
| Line Regulation | ΔVOUT/(VOUT×ΔVIN) | -1 | 0.75 | 1 | %/V | (VR + 1)V ≤ VIN ≤ 6V; typ ±0.75 | 3 |
| Load Regulation | ΔVOUT/VOUT | -1.5 | 1 | 1.5 | % | IL = 0.1 mA to 250 mA for VR ≥ 2.5V, Note 4; typ ±1.0 | 3 |
| Dropout Voltage | VIN-VOUT | 178 | 350 | mV | VR ≥ 2.5V, IL = 250 mA, Note 1, Note 5 | 3 | |
| VOUT Temperature Coefficient | TCVOUT | 50 | ppm/°C | Note 3 | 3 | ||
| Output Rise Time | TR | 500 | µs | 10% VR to 90% VR, VIN = 0V to 6V, RL = 50 Ω resistive | 3 | ||
| Output Noise | eN | 3 | µV/√Hz | IL = 100 mA, f = 1 kHz, COUT = 1 µF | 4 | ||
| Power Supply Ripple Rejection Ratio | PSRR | 44 | dB | f = 100 Hz, COUT = 1 µF, IL = 50 mA, VINAC = 100 mV pk-pk, CIN = 0 µF, VR = 1.2V | 4 | ||
| Thermal Shutdown Protection | TSD | 140 | °C | VIN = VR + 1V, IL = 100 µA | 4 | ||
| Specified Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Operating Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Supply Voltage | VDD | 6.5 | V | 3 | |||
| Input/Output Pin Voltage | -0.3 | 0.3 | V | All inputs and outputs w.r.t. (VSS - 0.3V) to (VIN + 0.3V) | 3 | ||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 3 | ||
| ESD protection HBM | 4 | kV | HBM, all pins | 3 | |||
| ESD protection MM | 400 | V | MM, all pins | 3 | |||
| Thermal Resistance, SOT-23 Junction to Ambient | θJA | 212 | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 | ||
| Thermal Resistance, SOT-23 Junction to Case (Top) | θJC(Top) | 139 | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 | ||
| Thermal Resistance, SOT-23 Junction to Case (Bottom) | θJC(Bottom) | 11.95 | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 | ||
| Thermal Resistance, SOT-23 Junction to Top | ψJT | 6.15 | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 |
CAD (KiCad official)
- Symbol:
MCP1700T-5002E - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
mcp1700t-5002e-etched.step/mcp1700t-5002e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1700t-5002e.step/mcp1700t-5002e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (32 pp, sha256
44919ee695b5d6ef, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP1700T-5002E
**Microchip Tech** · Linear Voltage Regulators (LDO) · SOT-23
MCP1700T-5002E from Microchip Tech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Regulator ground, tied to the negative side of the output and input capacitors, carrying only the 1.6 µA typical LDO bias current, and it is the reference for output regulation. |
| 2 | VOUT | power_out | Regulated voltage output, connected to the positive side of the load and output capacitor (1 µF stable), carrying the DC load current up to 250 mA for VOUT ≥ 2.5V. |
| 3 | VIN | power_in | Unregulated supply input accepting 2.3V to 6.0V, needing low source impedance with typically 1 µF of input capacitance for stable operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23 |
| Category | Power Management ICs |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Operating Voltage | VIN | 2.3 | | 6 | V | Note 1 | 3 |
| Input Quiescent Current | Iq | | 1.6 | 4 | µA | IL = 0 mA, VIN = VR + 1V | 3 |
| Maximum Output Current | IOUT_mA | 250 | | | mA | For VR ≥ 2.5V | 3 |
| Output Short Circuit Current | IOUT_SC | | 408 | | mA | VIN = VR + 1V, VOUT = GND; peak current measured 10 ms after short is applied | 3 |
| Output Voltage Regulation (25°C) | VOUT | -2 | 0.4 | 2 | % | Note 2; relative to VR; typ ±0.4% | 3 |
| Output Voltage Regulation (TJ -40 to +125°C) | VOUT | -3 | | 3 | % | Note 2; boldface, TJ -40°C to +125°C; relative to VR | 3 |
| Line Regulation | ΔVOUT/(VOUT×ΔVIN) | -1 | 0.75 | 1 | %/V | (VR + 1)V ≤ VIN ≤ 6V; typ ±0.75 | 3 |
| Load Regulation | ΔVOUT/VOUT | -1.5 | 1 | 1.5 | % | IL = 0.1 mA to 250 mA for VR ≥ 2.5V, Note 4; typ ±1.0 | 3 |
| Dropout Voltage | VIN-VOUT | | 178 | 350 | mV | VR ≥ 2.5V, IL = 250 mA, Note 1, Note 5 | 3 |
| VOUT Temperature Coefficient | TCVOUT | | 50 | | ppm/°C | Note 3 | 3 |
| Output Rise Time | TR | | 500 | | µs | 10% VR to 90% VR, VIN = 0V to 6V, RL = 50 Ω resistive | 3 |
| Output Noise | eN | | 3 | | µV/√Hz | IL = 100 mA, f = 1 kHz, COUT = 1 µF | 4 |
| Power Supply Ripple Rejection Ratio | PSRR | | 44 | | dB | f = 100 Hz, COUT = 1 µF, IL = 50 mA, VINAC = 100 mV pk-pk, CIN = 0 µF, VR = 1.2V | 4 |
| Thermal Shutdown Protection | TSD | | 140 | | °C | VIN = VR + 1V, IL = 100 µA | 4 |
| Specified Temperature Range | TA | -40 | | 125 | °C | | 4 |
| Operating Temperature Range | TJ | -40 | | 125 | °C | | 4 |
| Storage Temperature Range | TA | -65 | | 150 | °C | | 4 |
| Supply Voltage | VDD | | | 6.5 | V | | 3 |
| Input/Output Pin Voltage | | -0.3 | | 0.3 | V | All inputs and outputs w.r.t. (VSS - 0.3V) to (VIN + 0.3V) | 3 |
| Storage Temperature | | -65 | | 150 | °C | | 3 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 3 |
| Operating Junction Temperature | TJ | -40 | | 125 | °C | | 3 |
| ESD protection HBM | | | | 4 | kV | HBM, all pins | 3 |
| ESD protection MM | | | | 400 | V | MM, all pins | 3 |
| Thermal Resistance, SOT-23 Junction to Ambient | θJA | | 212 | | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 |
| Thermal Resistance, SOT-23 Junction to Case (Top) | θJC(Top) | | 139 | | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 |
| Thermal Resistance, SOT-23 Junction to Case (Bottom) | θJC(Bottom) | | 11.95 | | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 |
| Thermal Resistance, SOT-23 Junction to Top | ψJT | | 6.15 | | °C/W | EIA/JEDEC JESD51-7 FR-4 4-Layer Board | 4 |
## CAD (KiCad official)
- Symbol: `MCP1700T-5002E`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `mcp1700t-5002e-etched.step` / `mcp1700t-5002e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp1700t-5002e.step` / `mcp1700t-5002e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/MCP1700-Data-Sheet-20001826F.pdf) (32 pp, sha256 `44919ee695b5d6ef`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp1700t-5002e-datasheet.pdf)