# MCP1640T-I

**Microchip Tech** · DC-DC Converters · SOT-23-6

MCP1640T-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | passive | Switch node connecting the boost inductor from the input voltage; carries inductor current up to 800 mA peak, joining the internal N-Channel switch drain and P-Channel switch source. |
| 2 | GND | power_in | Ground/return pin for circuit ground; keep traces from input cap return, output cap return and GND pin as short as possible to minimize noise. |
| 3 | EN | input | Logic-level enable input where logic high (>90% of VIN) enables the regulator output and logic low (<20% of VIN) disables it, lowering quiescent current. |
| 4 | VFB | input | Feedback voltage pin for output regulation via a resistor divider, with 1.21V typical when the output is in regulation. |
| 5 | VOUT | power_out | Output voltage pin connecting the integrated P-Channel MOSFET to the output capacitor, and to which the FB voltage divider is also connected for regulation. |
| 6 | VIN | power_in | Input voltage pin for the source, which should be decoupled to GND with a 4.7 µF minimum capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum Start-Up Voltage | VIN |  | 0.65 | 0.8 | V | Note 1: 3.3 kΩ resistive load, 3.3VOUT (1 mA) | 3 |
| Output Voltage Adjust Range | VOUT | 2 |  | 5.5 | V | VOUT ≥ VIN; Note 2 | 3 |
| Feedback Voltage | VFB | 1.175 | 1.21 | 1.245 | V |  | 3 |
| Quiescent Current, PFM Mode | IQPFM |  | 19 | 30 | µA | Measured at VOUT = 4.0V; EN = VIN, IOUT = 0 mA; Note 3 | 3 |
| Quiescent Current, Shutdown | IQSHDN |  | 0.7 | 2.3 | µA | VOUT = EN = GND; Includes N-Channel and P-Channel Switch Leakage | 3 |
| NMOS Switch Leakage | INLK |  | 0.3 | 1 | µA | VIN = VSW = 5V; VOUT = 5.5V; VEN = VFB = GND | 3 |
| PMOS Switch Leakage | IPLK |  | 0.05 | 0.2 | µA | VIN = VSW = GND; VOUT = 5.5V | 3 |
| NMOS Peak Switch Current Limit | IN(MAX) | 600 | 850 |  | mA | Note 5 | 4 |
| VOUT Accuracy | VOUT% | -3 |  | 3 | % | Includes Line and Load Regulation; VIN = 1.5V | 4 |
| Line Regulation | ΔVOUT/VOUT/ΔVIN | -1 | 0.01 | 1 | %/V | VIN = 1.5V to 3V, IOUT = 25 mA | 4 |
| Load Regulation | ΔVOUT/VOUT | -1 | 0.01 | 1 | % | IOUT = 25 mA to 100 mA; VIN = 1.5V | 4 |
| Maximum Duty Cycle | DCMAX | 88 | 90 |  | % |  | 4 |
| Switching Frequency | fSW | 425 | 500 | 575 | kHz |  | 4 |
| EN Input Logic High | VIH | 90 |  |  | % of VIN | IOUT = 1 mA | 4 |
| EN Input Logic Low | VIL |  |  | 20 | % of VIN | IOUT = 1 mA | 4 |
| Operating Junction Temperature Range | TJ | -40 |  | 125 | °C | Steady State | 4 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 4 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C | Transient | 4 |
| EN, VFB, VIN, VSW, VOUT - GND |  |  |  | 6.5 | V |  | 3 |
| Ambient Temp. with Power Applied |  | -40 |  | 85 | °C |  | 3 |
| ESD Protection HBM |  |  |  | 3 | kV | All pins | 3 |
| Thermal Resistance, 6LD-SOT-23 | θJA |  | 190.5 |  | °C/W |  | 4 |
| Minimum Input Voltage After Start-Up | VIN |  | 0.35 |  | V | Note 1 | 3 |
| Maximum Output Current | IOUT |  | 150 |  | mA | 1.2V VIN, 2.0V VOUT | 3 |
| Maximum Output Current | IOUT |  | 350 |  | mA | 3.3V VIN, 5.0V VOUT | 3 |
| Quiescent Current, PWM Mode | IQPWM |  | 220 |  | µA | Measured at VOUT = 4.0V; EN = VIN, IOUT = 0 mA; Note 3 | 3 |
| NMOS Switch ON Resistance | RDS(ON)N |  | 0.6 |  | Ω | VIN = 3.3V, ISW = 100 mA | 4 |
| PMOS Switch ON Resistance | RDS(ON)P |  | 0.9 |  | Ω | VIN = 3.3V, ISW = 100 mA | 4 |
| Soft-Start Time | tSS |  | 750 |  | µS | EN Low-to-High, 90% of VOUT; Note 4 | 4 |
| Thermal Shutdown Die Temperature | TSD |  | 150 |  | °C |  | 4 |
| Die Temperature Hysteresis | TSDHYS |  | 10 |  | °C |  | 4 |
| Input Capacitor CIN | CIN | 4.7 |  |  | µF | Recommended range | 16 |
| Output Capacitor COUT | COUT | 10 |  | 100 | µF | Recommended range | 16 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | gold | MC =Plastic Dual Flat, No Lead (2x3 DFN), 8-lead *Y = Nickel palladium gold manufacturing designator. | 29 |

## CAD (KiCad official)

- Symbol: `MCP1640T-I`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `mcp1640t-i-etched.step` / `mcp1640t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp1640t-i.step` / `mcp1640t-i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp1640t-i-datasheet.pdf) (32 pp, sha256 `2cb0a5fd4fc8550b`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp1640t-i-datasheet.pdf)