component
MCP14E5-E
Public Made by Adomby adom
Microchip Tech Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP14E5-E
Microchip Tech · Gate Drivers · SOIC-8
MCP14E5-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENB_A | input | Enable control for Output A, active high and internally pulled up to VDD so it can be left floating; Output A is forced off when the pin is pulled below VEN_L (2.0V typical). |
| 2 | IN A | input | Input A is a high-impedance TTL/CMOS compatible input with hysteresis between its high and low input levels. |
| 3 | GND | power_in | Device return pin; it should have a low-impedance connection to the bias supply source return because high peak currents flow out of it when the capacitive load discharges. |
| 4 | IN B | input | Input B is a high-impedance TTL/CMOS compatible input with hysteresis between its high and low input levels. |
| 5 | OUT B | output | Output B is a CMOS push-pull output capable of sourcing and sinking 4.0A peak current (VDD = 18V) with a reverse latch-up rating of 1.5A. |
| 6 | VDD | power_in | Bias supply input with a voltage range of 4.5V to 18V, which must be decoupled to ground with a local ceramic capacitor. |
| 7 | OUT A | output | Output A is a CMOS push-pull output capable of sourcing and sinking 4.0A peak current (VDD = 18V) with a reverse latch-up rating of 1.5A. |
| 8 | ENB_B | input | Enable control for Output B, active high and internally pulled up to VDD so it can be left floating; Output B is forced off when the pin is pulled below VEN_L (2.0V typical). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (Logic 1, High) | VIH | 2.4 | 1.5 | V | TA = +25°C (table header) | 3 | |
| Input Voltage (Logic 0, Low) | VIL | 1.3 | 0.8 | V | TA = +25°C (table header) | 3 | |
| Input Current | IIN | -1 | 1 | µA | TA = +25°C; 0V ≤ VIN ≤ VDD | 3 | |
| Input Voltage | VIN | -5 | V | TA = +25°C; maximum printed as VDD+0.3V (expression, not numeric) | 3 | ||
| Low Output Voltage | VOL | 0.025 | V | TA = +25°C; DC Test | 3 | ||
| Output Resistance, High | ROH | 2.5 | 3.5 | Ω | TA = +25°C; IOUT = 10 mA, VDD = 18V | 3 | |
| Output Resistance, Low | ROL | 2.5 | 3 | Ω | TA = +25°C; IOUT = 10 mA, VDD = 18V | 3 | |
| Rise Time | tR | 15 | 30 | ns | TA = +25°C; Figure 4-1, Figure 4-2; CL = 2200 pF | 3 | |
| Fall Time | tF | 18 | 30 | ns | TA = +25°C; Figure 4-1, Figure 4-2; CL = 2200 pF | 3 | |
| Propagation Delay Time (tD1) | tD1 | 46 | 55 | ns | TA = +25°C; Figure 4-1, Figure 4-2 | 3 | |
| Propagation Delay Time (tD2) | tD2 | 50 | 55 | ns | TA = +25°C; Figure 4-1, Figure 4-2 | 3 | |
| Enable High-Level Input Voltage | VEN_H | 1.6 | 1.9 | 2.9 | V | TA = +25°C; VDD = 12V, LO to HI Transition | 3 |
| Enable Low-Level Input Voltage | VEN_L | 1.3 | 2.2 | 2.4 | V | TA = +25°C; VDD = 12V, HI to LO Transition | 3 |
| Enable Hysteresis | VHYST | 0.1 | 0.3 | 0.6 | V | TA = +25°C | 3 |
| Enable Leakage Current | IENBL | 40 | 85 | 115 | µA | TA = +25°C; VDD = 12V, ENB_A = ENB_B = GND | 3 |
| Supply Voltage | VDD | 4.5 | 18 | V | TA = +25°C | 4 | |
| Supply Current | IDD | 1.6 | 2 | mA | TA = +25°C; VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = High | 4 | |
| Supply Current | IDD | 0.6 | 0.9 | mA | TA = +25°C; VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = High | 4 | |
| Supply Current | IDD | 1.2 | 1.4 | mA | TA = +25°C; VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = High | 4 | |
| Supply Current | IDD | 1.4 | 1.8 | mA | TA = +25°C; VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = Low | 4 | |
| Supply Current | IDD | 0.55 | 0.75 | mA | TA = +25°C; VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = Low | 4 | |
| Supply Current | IDD | 1 | 1.2 | mA | TA = +25°C; VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = Low | 4 | |
| Input Voltage (Logic 1, High) over temperature | VIH | 2.4 | V | Over operating temperature range | 5 | ||
| Input Voltage (Logic 0, Low) over temperature | VIL | 0.8 | V | Over operating temperature range | 5 | ||
| Input Current over temperature | IIN | -10 | 10 | µA | Over operating temperature range; 0V ≤ VIN ≤ VDD | 5 | |
| Low Output Voltage over temperature | VOL | 0.025 | V | Over operating temperature range; DC TEST | 5 | ||
| Output Resistance, High over temperature | ROH | 3 | 6 | Ω | Over operating temperature range; IOUT = 10 mA, VDD = 18V | 5 | |
| Output Resistance, Low over temperature | ROL | 3 | 5 | Ω | Over operating temperature range; IOUT = 10 mA, VDD = 18V | 5 | |
| Rise Time over temperature | tR | 25 | 40 | ns | Over operating temperature range; Figure 4-1, Figure 4-2; CL = 2200 pF | 5 | |
| Fall Time over temperature | tF | 28 | 40 | ns | Over operating temperature range; Figure 4-1, Figure 4-2; CL = 2200 pF | 5 | |
| Delay Time (tD1) over temperature | tD1 | 50 | 70 | ns | Over operating temperature range; Figure 4-1, Figure 4-2 | 5 | |
| Delay Time (tD2) over temperature | tD2 | 50 | 70 | ns | Over operating temperature range; Figure 4-1, Figure 4-2 | 5 | |
| Enable High-Level Input Voltage over temperature | VEN_H | 1.6 | 2.2 | 2.9 | V | Over operating temperature range; VDD = 12V, LO to HI Transition | 5 |
| Enable Low-Level Input Voltage over temperature | VEN_L | 1.3 | 1.8 | 2.4 | V | Over operating temperature range; VDD = 12V, HI to LO Transition | 5 |
| Enable Leakage Current over temperature | IENBL | 40 | 87 | 115 | µA | Over operating temperature range; VDD = 12V, ENB_A = ENB_B = GND | 5 |
| Supply Current over temperature | IDD | 2 | 3 | mA | Over operating temperature range; VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = High | 5 | |
| Supply Current over temperature | IDD | 0.8 | 1.1 | mA | Over operating temperature range; VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = High | 5 | |
| Supply Current over temperature | IDD | 1.5 | 2 | mA | Over operating temperature range; VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = High | 5 | |
| Supply Current over temperature | IDD | 1.8 | 2.8 | mA | Over operating temperature range; VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = Low | 5 | |
| Supply Current over temperature | IDD | 0.6 | 0.8 | mA | Over operating temperature range; VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = Low | 5 | |
| Supply Current over temperature | IDD | 1.1 | 1.8 | mA | Over operating temperature range; VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = Low | 5 | |
| Supply Voltage (absolute maximum) | 20 | V | 3 | ||||
| Input Current (VIN > VDD) | 50 | mA | VIN > VDD | 3 | |||
| Specified Temperature Range | TA | -40 | 125 | °C | 6 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 6 | |||
| Storage Temperature Range | TA | -65 | 150 | °C | 6 | ||
| Thermal Resistance, 8L-SOIC | θJA | 149.5 | °C/W | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN), Narrow, 3.90 mm Body [SOIC] Notes: | 18 |
CAD (KiCad official)
- Symbol:
MCP14E5-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp14e5-e-etched.step/mcp14e5-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp14e5-e.step/mcp14e5-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (26 pp, sha256
22c1a1b5392178e6, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).