component

MC74VHC1G08DFT2G

Public Made by Adom

by adom

onsemi Gates, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs mc74vhc1g08dft2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
mc74vhc1g08dft2g-etched.fit.json mc74vhc1g08dft2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mc74vhc1g08dft2g-etched.glb mc74vhc1g08dft2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mc74vhc1g08dft2g-etched.step mc74vhc1g08dft2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
mc74vhc1g08dft2g.glb Publish 0.1.0 · Ray 1mo ago
mc74vhc1g08dft2g.kicad_mod Publish 0.1.0 · Ray 1mo ago
mc74vhc1g08dft2g.kicad_sym Publish 0.1.0 · Ray 1mo ago
mc74vhc1g08dft2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 5 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
mc74vhc1g08dft2g.step Publish 0.1.0 · Ray 1mo ago
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 7d ago
README.md mc74vhc1g08dft2g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

MC74VHC1G08DFT2G

onsemi · Gates · SOT-353

MC74VHC1G08DFT2G from onsemi, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN B input AND gate input B. CMOS logic input, VIH = 3.15 V min at VCC = 4.5 V, VIL = 1.35 V max at VCC = 4.5 V. Tolerates input voltages up to 7.0 V regardless of VCC, permitting 5 V-to-3 V level shifting.
2 IN A input AND gate input A. CMOS logic input, VIH = 3.15 V min at VCC = 4.5 V, VIL = 1.35 V max at VCC = 4.5 V. Tolerates input voltages up to 7.0 V regardless of VCC.
3 GND power_in Ground reference (0 V) for the device.
4 OUT Y output AND gate output Y (Y = A AND B). Push-pull CMOS output, VOH >= 3.80 V min and VOL <= 0.44 V max at VCC = 4.5 V with +/-8 mA drive. Absolute-max output sink/source current +/-12.5 mA.
5 VCC power_in Positive supply. Recommended operating range 2.0 V to 5.5 V; absolute maximum -0.5 V to 7.0 V. Bypass to GND with a local ceramic capacitor.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-353
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • MC74VHC1G08DFT2GDFT1G
  • MC74VHC1G08DFT2G
  • MC74VHC1G08DFT2GDTT1G

CAD (KiCad official)

  • Symbol: MC74VHC1G08DFT2G
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: mc74vhc1g08dft2g-etched.step / mc74vhc1g08dft2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhc1g08dft2g.step / mc74vhc1g08dft2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 d5e0d4b6e816d1bf, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF