component
MC74HCT574ADTR2G
Public Made by Adomby adom
onsemi Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "MC74HCT574ADTR2G",
"brief": "onsemi Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"mpn": "MC74HCT574ADTR2G",
"manufacturer": "onsemi",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Flip Flops",
"datasheet": "https://www.onsemi.com/pdf/datasheet/mc74hct574adtr2-d.pdf",
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"lcsc": "C904084",
"mouser": "863-MC74HCT574ADTR2G"
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{
"number": "1",
"name": "OE",
"type": "input",
"description": "Active-low Output Enable; when high, all Q outputs are forced to the high-impedance state, and it does not affect the stored flip-flop states."
},
{
"number": "2",
"name": "D0",
"type": "input",
"description": "Data input 0 for the D flip-flop, which is clocked to Q0 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "3",
"name": "D1",
"type": "input",
"description": "Data input 1 for the D flip-flop, which is clocked to Q1 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "4",
"name": "D2",
"type": "input",
"description": "Data input 2 for the D flip-flop, which is clocked to Q2 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "5",
"name": "D3",
"type": "input",
"description": "Data input 3 for the D flip-flop, which is clocked to Q3 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "6",
"name": "D4",
"type": "input",
"description": "Data input 4 for the D flip-flop, which is clocked to Q4 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "7",
"name": "D5",
"type": "input",
"description": "Data input 5 for the D flip-flop, which is clocked to Q5 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "8",
"name": "D6",
"type": "input",
"description": "Data input 6 for the D flip-flop, which is clocked to Q6 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "9",
"name": "D7",
"type": "input",
"description": "Data input 7 for the D flip-flop, which is clocked to Q7 on the rising edge of CLOCK; inputs must be held within GND to VCC and unused inputs must be tied to GND or VCC."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V) for all voltages in the device, per the datasheet's voltages-referenced-to-GND convention."
},
{
"number": "11",
"name": "CLOCK",
"type": "input",
"description": "Clock input; data meeting setup time is transferred to the outputs on its rising edge."
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{
"number": "12",
"name": "Q7",
"type": "tri_state",
"description": "Non-inverting 3-state output 7, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "13",
"name": "Q6",
"type": "tri_state",
"description": "Non-inverting 3-state output 6, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "14",
"name": "Q5",
"type": "tri_state",
"description": "Non-inverting 3-state output 5, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "15",
"name": "Q4",
"type": "tri_state",
"description": "Non-inverting 3-state output 4, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "16",
"name": "Q3",
"type": "tri_state",
"description": "Non-inverting 3-state output 3, which drives 15 LSTTL loads and is high-impedance when OE is high."
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{
"number": "17",
"name": "Q2",
"type": "tri_state",
"description": "Non-inverting 3-state output 2, which drives 15 LSTTL loads and is high-impedance when OE is high."
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{
"number": "18",
"name": "Q1",
"type": "tri_state",
"description": "Non-inverting 3-state output 1, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "19",
"name": "Q0",
"type": "tri_state",
"description": "Non-inverting 3-state output 0, which drives 15 LSTTL loads and is high-impedance when OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Positive supply; the recommended operating range is 4.5 V to 5.5 V referenced to GND."
}
],
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"extractor flagged: The page 1 pin assignment and logic diagram are a device-level figure, not a TSSOP-specific one. The; The datasheet gives OE as active-low in the function table (OE low enables outputs, OE high forces Z"
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{
"name": "DC Supply Current, VCC and GND Pins",
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"min": -75,
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"source_page": 2,
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"min": -65,
"typ": null,
"max": 150,
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"name": "Minimum High-Level Input Voltage",
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"unit": "V",
"min": 2,
"typ": null,
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"conditions": "Vout = 0.1 V or VCC – 0.1 V; |Iout| ≤ 20 µA; VCC 4.5 V and 5.5 V; 2.0 V at all temperature ranges",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Low-Level Input Voltage",
"symbol": "VIL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.8,
"conditions": "Vout = 0.1 V or VCC – 0.1 V; |Iout| ≤ 20 µA; VCC 4.5 V and 5.5 V; 0.8 V at all temperature ranges",
"source_page": 3,
"source": "datasheet"
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"name": "Minimum High-Level Output Voltage",
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"conditions": "Vin = VIH or VIL; |Iout| ≤ 20 µA; VCC = 4.5 V; all temperature ranges",
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"name": "Minimum High-Level Output Voltage",
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"conditions": "Vin = VIH or VIL; |Iout| ≤ 20 µA; VCC = 5.5 V; all temperature ranges",
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"name": "Minimum High-Level Output Voltage",
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"min": 3.7,
"typ": null,
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"conditions": "Vin = VIH or VIL; |Iout| ≤ 6.0 mA; VCC = 4.5 V; 3.98 V at −55 to 25 °C, 3.84 V at 85 °C, 3.7 V at 125 °C",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Low-Level Output Voltage",
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"conditions": "Vin = VIH or VIL; |Iout| ≤ 20 µA; VCC = 4.5 V; all temperature ranges",
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{
"name": "Maximum Low-Level Output Voltage",
"symbol": "VOL",
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"min": null,
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"conditions": "Vin = VIH or VIL; |Iout| ≤ 6.0 mA; VCC = 4.5 V; 0.26 V at −55 to 25 °C, 0.33 V at 85 °C, 0.4 V at 125 °C",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Input Leakage Current",
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"kind": "electrical",
"unit": "µA",
"min": -1,
"typ": null,
"max": 1,
"conditions": "Vin = VCC or GND; VCC = 5.5 V; ±0.1 µA at −55 to 25 °C, ±1.0 µA at 85 and 125 °C",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Quiescent Supply Current (per Package)",
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"min": null,
"typ": null,
"max": 160,
"conditions": "Vin = VCC or GND; Iout = 0 µA; VCC = 5.5 V; 4.0 µA at −55 to 25 °C, 40 µA at 85 °C",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Three-State Leakage Current",
"symbol": "IOZ",
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"unit": "µA",
"min": -10,
"typ": null,
"max": null,
"conditions": "Vin = VIL or VIH; Vout = VCC or GND; VCC = 5.5 V; printed −0.5 µA at −55 to 25 °C, −5.0 µA at 85 °C, −10 µA at 125 °C",
"source_page": 3,
"source": "datasheet"
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{
"name": "Additional Quiescent Supply Current",
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"min": null,
"typ": null,
"max": 2.9,
"conditions": "Vin = 2.4 V any one input; other inputs VCC or GND; Iout = 0 µA; VCC = 5.5 V; 2.9 mA at −55 °C, 2.4 mA at 25 to 125 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Input Capacitance",
"symbol": "Cin",
"kind": "electrical",
"unit": "pF",
"min": null,
"typ": null,
"max": 10,
"conditions": "",
"source_page": 3,
"source": "datasheet"
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{
"name": "Maximum Clock Frequency (50% Duty Cycle)",
"symbol": "fMAX",
"kind": "timing",
"unit": "MHz",
"min": 20,
"typ": null,
"max": null,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns; Figures 2 and 5; 30 MHz at −55 to 25 °C, 24 MHz at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Propagation Delay, Clock to Q",
"symbol": "tPLH, tPHL",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 45,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF; Figures 2 and 5; 30 ns at −55 to 25 °C, 38 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Propagation Delay, Output Enable to Q",
"symbol": "tPLZ, tPHZ",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 42,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF; Figures 3 and 6; 28 ns at −55 to 25 °C, 35 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Propagation Delay Time, Output Enable to Q",
"symbol": "tPZH, tPZL",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 42,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF; Figures 3 and 6; 28 ns at −55 to 25 °C, 35 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Output Transition Time, Any Output",
"symbol": "tTLH, tTHL",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 18,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF; Figures 2, 3 and 5; 12 ns at −55 to 25 °C, 15 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Minimum Setup Time, Data to Clock",
"symbol": "tsu",
"kind": "timing",
"unit": "ns",
"min": 15,
"typ": null,
"max": null,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns; Figure 4; 10 ns at −55 to 25 °C, 13 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Minimum Hold Time, Clock to Data",
"symbol": "th",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
"max": null,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns; Figure 4; 5.0 ns at all temperature ranges",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Minimum Pulse Width, Clock",
"symbol": "tw",
"kind": "timing",
"unit": "ns",
"min": 22,
"typ": null,
"max": null,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns; Figure 2; 15 ns at −55 to 25 °C, 19 ns at 85 °C",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Maximum Input Rise and Fall Times",
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"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 500,
"conditions": "VCC = 5.0 V ±10%, CL = 50 pF, Input tr = tf = 6.0 ns; Figure 2; 500 ns at all temperature ranges",
"source_page": 3,
"source": "datasheet"
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"mc74hct574adtr2g-hero.overlay.json",
"mc74hct574adtr2g-etched.glb"
],
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}
}