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MC74HC365ADTR2G

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onsemi Buffers / Drivers, TSSOP-16. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.

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MC74HC365ADTR2G

onsemi · Buffers / Drivers · TSSOP-16

MC74HC365ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTPUT ENABLE 1 input Active-low Output Enable 1; when either enable (OE1 or OE2) is high, the buffer outputs go to high-impedance.
2 A0 input Data input to buffer 0; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
3 Y0 tri_state Noninverting 3-state output of buffer 0; left open if unused.
4 A1 input Data input to buffer 1; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
5 Y1 tri_state Noninverting 3-state output of buffer 1; left open if unused.
6 A2 input Data input to buffer 2; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
7 Y2 tri_state Noninverting 3-state output of buffer 2; left open if unused.
8 GND power_in Ground reference for all voltages; the device is specified with VCC referenced to GND.
9 Y3 tri_state Noninverting 3-state output of buffer 3; left open if unused.
10 A3 input Data input to buffer 3; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
11 Y4 tri_state Noninverting 3-state output of buffer 4; left open if unused.
12 A4 input Data input to buffer 4; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
13 Y5 tri_state Noninverting 3-state output of buffer 5; left open if unused.
14 A5 input Data input to buffer 5; Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
15 OUTPUT ENABLE 2 input Active-low Output Enable 2; when either enable (OE1 or OE2) is high, the buffer outputs go to high-impedance.
16 VCC power_in Positive supply, specified at 2.0 V to 6.0 V referenced to GND (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC 2 6 V 3
DC Input Voltage, Output Voltage (Referenced to GND) Vin, Vout 0 V max = VCC 3
Operating Temperature, All Package Types TA -55 125 °C 3
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V (Figure 1) 3
Input Rise and Fall Time tr, tf 0 600 ns VCC = 3.0 V (Figure 1) 3
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V (Figure 1) 3
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V (Figure 1) 3
DC Supply Voltage VCC -0.5 7 V Referenced to GND 3
DC Input Voltage Vin -0.5 V Referenced to GND; max = VCC + 0.5 V 3
DC Output Voltage Vout -0.5 V Referenced to GND; max = VCC + 0.5 V 3
DC Input Current, per Pin Iin -20 20 mA 3
DC Output Current, per Pin Iout -25 25 mA 3
DC Supply Current, VCC and GND Pins ICC -50 50 mA 3
Power Dissipation in Still Air, TSSOP Package PD 450 mW TSSOP package; still air 3
Storage Temperature Tstg -65 150 °C 3
Lead Temperature TL 260 °C SOIC or TSSOP package; 1 mm from case for 10 seconds 3
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V; Vout = VCC, 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Input Voltage VIH 2.1 V VCC = 3.0 V; Vout = VCC, 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V; Vout = VCC, 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Input Voltage VIH 4.2 V VCC = 6.0 V; Vout = VCC, 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V; Vout = 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 3.0 V; Vout = 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 1.35 V VCC = 4.5 V; Vout = 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 1.8 V VCC = 6.0 V; Vout = 0.1 V; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Output Voltage VOH 1.9 V VCC = 2.0 V; Vin = VIH; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Output Voltage VOH 4.4 V VCC = 4.5 V; Vin = VIH; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Output Voltage VOH 5.9 V VCC = 6.0 V; Vin = VIH; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Minimum High-Level Output Voltage VOH 2.2 V VCC = 3.0 V; Vin = VIH; /Iout/ ≤ 3.6 mA; TA = 125 °C 3
Minimum High-Level Output Voltage VOH 3.7 V VCC = 4.5 V; Vin = VIH; /Iout/ ≤ 6.0 mA; TA = 125 °C 3
Minimum High-Level Output Voltage VOH 5.2 V VCC = 6.0 V; Vin = VIH; /Iout/ ≤ 7.8 mA; TA = 125 °C 3
Maximum Low-Level Output Voltage VOL 0.1 V VCC = 2.0 V; Vin = VIL; /Iout/ ≤ 20 μA; TA -55 to 125 °C 3
Maximum Low-Level Output Voltage VOL 0.4 V VCC = 3.0 V; Vin = VIL; /Iout/ ≤ 3.6 mA; TA = 125 °C 3
Maximum Input Leakage Current Iin -1 1 μA VCC = 6.0 V; Vin = VCC or GND; TA = 125 °C 4
Maximum Three-State Leakage Current IOZ -10 10 μA VCC = 6.0 V; output in high-impedance state; Vin = VIL or VIH; Vout = VCC or GND; TA = 125 °C 4
Maximum Quiescent Supply Current (per Package) ICC 160 μA VCC = 6.0 V; Vin = VCC or GND; Iout = 0 μA; TA = 125 °C 4
Maximum Input Capacitance Cin 10 pF 4
Maximum Three-State Output Capacitance Cout 15 pF Output in high-impedance state 4
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 180 ns VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 90 ns VCC = 3.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 36 ns VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 31 ns VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Propagation Delay, Output Enable to Output Y tPLZ, tPHZ 330 ns VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 2 and 4) 4
Maximum Propagation Delay, Output Enable to Output Y tPLZ, tPHZ 170 ns VCC = 3.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 2 and 4) 4
Maximum Propagation Delay, Output Enable to Output Y tPLZ, tPHZ 66 ns VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 2 and 4) 4
Maximum Propagation Delay, Output Enable to Output Y tPLZ, tPHZ 56 ns VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 2 and 4) 4
Maximum Output Transition Time, Any Output tTLH, tTHL 90 ns VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Output Transition Time, Any Output tTLH, tTHL 34 ns VCC = 3.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Output Transition Time, Any Output tTLH, tTHL 18 ns VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4
Maximum Output Transition Time, Any Output tTLH, tTHL 15 ns VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; TA = 125 °C (Figures 1 and 3) 4

CAD (KiCad official)

  • Symbol: MC74HC365ADTR2G
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: mc74hc365adtr2g-etched.step / mc74hc365adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc365adtr2g.step / mc74hc365adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 eb31c6ff0662833b, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF