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Ray Publish 0.1.0 f112d6d 5d ago

MC74HC244ADTR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

MC74HC244ADTR2G from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Enable A input Active-low output enable; when low, the YA1-YA4 outputs act as noninverting buffers, and when high they assume the high-impedance state.
2 A1 input Data input whose noninverted value appears on YA1 when the outputs are enabled; unused inputs must be tied to GND or VCC.
3 YB4 tri_state Noninverting three-state device output, high impedance when the Enable B pin is high.
4 A2 input Data input whose noninverted value appears on YA2 when the outputs are enabled; unused inputs must be tied to GND or VCC.
5 YB3 tri_state Noninverting three-state device output, high impedance when the Enable B pin is high.
6 A3 input Data input whose noninverted value appears on YA3 when the outputs are enabled; unused inputs must be tied to GND or VCC.
7 YB2 tri_state Noninverting three-state device output, high impedance when the Enable B pin is high.
8 A4 input Data input whose noninverted value appears on YA4 when the outputs are enabled; unused inputs must be tied to GND or VCC.
9 YB1 tri_state Noninverting three-state device output, high impedance when the Enable B pin is high.
10 GND power_in Ground reference for the device (PIN 10 = GND per the logic diagram); all voltages are referenced to this pin.
11 B1 input Data input whose noninverted value appears on YB1 when the outputs are enabled; unused inputs must be tied to GND or VCC.
12 YA4 tri_state Noninverting three-state device output, high impedance when the Enable A pin is high.
13 B2 input Data input whose noninverted value appears on YB2 when the outputs are enabled; unused inputs must be tied to GND or VCC.
14 YA3 tri_state Noninverting three-state device output, high impedance when the Enable A pin is high.
15 B3 input Data input whose noninverted value appears on YB3 when the outputs are enabled; unused inputs must be tied to GND or VCC.
16 YA2 tri_state Noninverting three-state device output, high impedance when the Enable A pin is high.
17 B4 input Data input whose noninverted value appears on YB4 when the outputs are enabled; unused inputs must be tied to GND or VCC.
18 YA1 tri_state Noninverting three-state device output, high impedance when the Enable A pin is high.
19 Enable B input Active-low output enable; when low, the YB1-YB4 outputs act as noninverting buffers, and when high they assume the high-impedance state.
20 VCC power_in Positive supply; the recommended DC supply range is 2.0 V to 6.0 V referenced to GND, with absolute maximum of 7.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND), absolute maximum VCC -0.5 7 V 2
DC Input Voltage (Referenced to GND), absolute maximum Vin -0.5 V 2
DC Output Voltage (Referenced to GND), absolute maximum Vout -0.5 V 2
DC Input Current, per Pin Iin -20 20 mA per pin 2
DC Output Current, per Pin Iout -35 35 mA per pin 2
DC Supply Current, VCC and GND Pins ICC -75 75 mA VCC and GND pins 2
Input Clamp Current IIK -20 20 mA VI < 0 or VI > VCC 2
Output Clamp Current IOK -20 20 mA VO < 0 or VO > VCC 2
Power Dissipation in Still Air, TSSOP Package PD 450 mW Still air, TSSOP package 2
Storage Temperature Tstg -65 150 C 2
Lead Temperature TL 260 C 1 mm from case for 10 seconds (SOIC, SSOP or TSSOP package) 2
DC Supply Voltage (Referenced to GND), recommended VCC 2 6 V 2
DC Input Voltage, Output Voltage (Referenced to GND), recommended Vin, Vout 0 V 2
Operating Temperature, All Package Types TA -55 125 C 2
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V 2
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V 2
Minimum High-Level Input Voltage VIH 1.5 V Vout = VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 2.0 V 3
Minimum High-Level Input Voltage VIH 2.1 V Vout = VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 3.0 V 3
Minimum High-Level Input Voltage VIH 3.15 V Vout = VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 4.5 V 3
Minimum High-Level Input Voltage VIH 4.2 V Vout = VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 6.0 V 3
Maximum Low-Level Input Voltage VIL 0.5 V Vout = 0.1 V; /Iout/ ≤ 20 µA; VCC = 2.0 V 3
Maximum Low-Level Input Voltage VIL 0.9 V Vout = 0.1 V; /Iout/ ≤ 20 µA; VCC = 3.0 V 3
Maximum Low-Level Input Voltage VIL 1.35 V Vout = 0.1 V; /Iout/ ≤ 20 µA; VCC = 4.5 V 3
Maximum Low-Level Input Voltage VIL 1.8 V Vout = 0.1 V; /Iout/ ≤ 20 µA; VCC = 6.0 V 3
Minimum High-Level Output Voltage VOH 1.9 V Vin = VIH; /Iout/ ≤ 20 µA; VCC = 2.0 V 3
Minimum High-Level Output Voltage VOH 4.4 V Vin = VIH; /Iout/ ≤ 20 µA; VCC = 4.5 V 3
Minimum High-Level Output Voltage VOH 5.9 V Vin = VIH; /Iout/ ≤ 20 µA; VCC = 6.0 V 3
Minimum High-Level Output Voltage VOH 2.2 V Vin = VIH; /Iout/ ≤ 2.4 mA; VCC = 3.0 V 3
Minimum High-Level Output Voltage VOH 3.7 V Vin = VIH; /Iout/ ≤ 6.0 mA; VCC = 4.5 V 3
Minimum High-Level Output Voltage VOH 5.2 V Vin = VIH; /Iout/ ≤ 7.8 mA; VCC = 6.0 V 3
Maximum Low-Level Output Voltage VOL 0.1 V Vin = VIL; /Iout/ ≤ 20 µA; VCC = 2.0 V 3
Maximum Low-Level Output Voltage VOL 0.4 V Vin = VIL; /Iout/ ≤ 2.4 mA; VCC = 3.0 V 3
Maximum Input Leakage Current Iin -1 1 µA Vin = VCC or GND; VCC = 6.0 V 3
Maximum Three-State Leakage Current IOZ -10 10 µA Output in high-impedance state; Vin = VIL or VIH; Vout = VCC or GND; VCC = 6.0 V 3
Maximum Quiescent Supply Current (per Package) ICC 160 µA Vin = VCC or GND; Iout = 0 µA; VCC = 6.0 V 3
Maximum Propagation Delay, A to YA or B to YB tPLH, tPHL 135 ns CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V 3
Maximum Propagation Delay, A to YA or B to YB tPLH, tPHL 70 ns CL = 50 pF, tr = tf = 6 ns; VCC = 3.0 V 3
Maximum Propagation Delay, A to YA or B to YB tPLH, tPHL 27 ns CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V 3
Maximum Propagation Delay, A to YA or B to YB tPLH, tPHL 23 ns CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V 3
Maximum Propagation Delay, Output Enable to YA or YB tPLZ, tPHZ 165 ns CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V 3
Maximum Propagation Delay, Output Enable to YA or YB tPLZ, tPHZ 80 ns CL = 50 pF, tr = tf = 6 ns; VCC = 3.0 V 3
Maximum Propagation Delay, Output Enable to YA or YB tPLZ, tPHZ 33 ns CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V 3
Maximum Propagation Delay, Output Enable to YA or YB tPLZ, tPHZ 28 ns CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V 3
Maximum Output Transition Time, Any Output tTLH, tTHL 90 ns CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V 3
Maximum Output Transition Time, Any Output tTLH, tTHL 32 ns CL = 50 pF, tr = tf = 6 ns; VCC = 3.0 V 3
Maximum Output Transition Time, Any Output tTLH, tTHL 18 ns CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V 3
Maximum Output Transition Time, Any Output tTLH, tTHL 15 ns CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V 3
Maximum Input Capacitance Cin 10 pF 3
Maximum Three-State Output Capacitance Cout 15 pF Output in high-impedance state 3

CAD (KiCad official)

  • Symbol: MC74HC244ADTR2G
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mc74hc244adtr2g-etched.step / mc74hc244adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc244adtr2g.step / mc74hc244adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 79898eb99ce51700, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF