component

MC14060BDG

Public Made by Adom

by adom

onsemi Counters / Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc14060bdgfactory-2.0.0extractor-text

Verified MC14060BDG

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MC14060BDG · SOIC-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C906824, digikey MC14060BDGOS-ND, mouser 863-MC14060BDG
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-3twd3s3i/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mc14060bdg.kicad_sym✓ mc14060bdg.kicad_mod✓ mc14060bdg.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 13h ago
viewers mc14060bdg: viewers · Ray 13h ago
mc14060bdg-etched.glb Publish 0.1.0 · Ray 13h ago
mc14060bdg-etched.step mc14060bdg: factory component page (tier=mfr) · Ray 13h ago
mc14060bdg-hero.glb mc14060bdg: hero GLB from the etched model (keeps the MPN mark) · Ray 13h ago
mc14060bdg-hero.overlay.json Publish 0.1.0 · Ray 13h ago
mc14060bdg.glb Publish 0.1.0 · Ray 13h ago
mc14060bdg.kicad_mod Publish 0.1.0 · Ray 13h ago
mc14060bdg.kicad_sym Publish 0.1.0 · Ray 13h ago
mc14060bdg.lbr Publish 0.1.0 · Ray 13h ago
mc14060bdg.step Publish 0.1.0 · Ray 13h ago
package.json Publish 0.1.0 · Ray 13h ago
page.json Set visibility: public · Ray 13h ago
README.md Publish 0.1.0 · Ray 13h ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 13h ago

MC14060BDG

onsemi · Counters / Dividers · SOIC-16

MC14060BDG from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q12 output Buffered counter output of stage 12, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
2 Q13 output Buffered counter output of stage 13, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
3 Q14 output Buffered counter output of stage 14, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
4 Q6 output Buffered counter output of stage 6, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
5 Q5 output Buffered counter output of stage 5, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
6 Q7 output Buffered counter output of stage 7, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
7 Q4 output Buffered counter output of stage 4, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
8 VSS power_in Negative supply (ground) reference for all voltages; Vin and Vout must stay within VSS to VDD.
9 OUT 2 output Oscillator buffer output 2 used with OUT 1 and CLOCK to build an RC or crystal oscillator; leave open if unused.
10 OUT 1 output Oscillator buffer output 1 used with OUT 2 and CLOCK to build an RC or crystal oscillator; leave open if unused.
11 CLOCK input Schmitt-trigger clock input, where a negative transition advances the counter to the next state and very slow rise and fall times are permitted.
12 RESET input Common reset input where a high level places all outputs in the zero state and disables the oscillator.
13 Q9 output Buffered counter output of stage 9, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
14 Q8 output Buffered counter output of stage 8, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
15 Q10 output Buffered counter output of stage 10, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
16 VDD power_in Positive supply pin with a supply voltage range of 3.0 V to 18 V and an absolute maximum rating of -0.5 to +18.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage Range VDD -0.5 18 V Voltages referenced to VSS 1
Supply Voltage Range VDD 3 18 V 1
Input or Output Voltage Range (DC or Transient) Vin, Vout -0.5 V Printed as VDD +0.5 V maximum 1
Input or Output Current (DC or Transient) per Pin Iin, Iout -10 10 mA DC or transient, per pin 1
Power Dissipation, per Package PD 500 mW Note 1: D/DW packages derate -7.0 mW/°C from 65°C to 125°C 1
Ambient Temperature Range TA -55 125 °C 1
Storage Temperature Range Tstg -65 150 °C 1
Lead Temperature TL 260 °C 8 second soldering 1
Output Voltage 0 Level VOL 0.05 V Vin = VDD or 0; VDD = 5.0 Vdc 3
Output Voltage 1 Level VOH 4.95 V Vin = 0 or VDD; VDD = 5.0 Vdc 3
Output Voltage 1 Level VOH 9.95 V Vin = 0 or VDD; VDD = 10 Vdc 3
Output Voltage 1 Level VOH 14.95 V Vin = 0 or VDD; VDD = 15 Vdc 3
Input Current Iin -0.1 0.1 A VDD = 15 Vdc, TA = -55°C 3
Input Current Iin -1 1 A VDD = 15 Vdc, TA = 125°C 3
Input Capacitance Cin 5 7.5 pF Vin = 0 3
Quiescent Current (Per Package) IDD 5 A VDD = 5.0 Vdc, TA = -55°C 3
Quiescent Current (Per Package) IDD 10 A VDD = 10 Vdc, TA = -55°C 3
Quiescent Current (Per Package) IDD 20 A VDD = 15 Vdc, TA = -55°C 3
Quiescent Current (Per Package) IDD 150 A VDD = 5.0 Vdc, TA = 125°C 3
Quiescent Current (Per Package) IDD 300 A VDD = 10 Vdc, TA = 125°C 3
Quiescent Current (Per Package) IDD 600 A VDD = 15 Vdc, TA = 125°C 3
Output Rise Time (Counter Outputs) tTLH 200 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Output Rise Time (Counter Outputs) tTLH 100 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Output Rise Time (Counter Outputs) tTLH 80 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4
Output Fall Time (Counter Outputs) tTHL 200 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Output Fall Time (Counter Outputs) tTHL 100 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Output Fall Time (Counter Outputs) tTHL 80 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4
Propagation Delay Time Clock to Q4 tPLH 740 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Propagation Delay Time Clock to Q4 tPLH 300 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Propagation Delay Time Clock to Q4 tPLH 200 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4
Clock Pulse Width twH 100 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Clock Pulse Width twH 40 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Clock Pulse Width twH 30 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4
Reset Pulse Width tw 120 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Reset Pulse Width tw 60 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Reset Pulse Width tw 40 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4
Propagation Delay Time Reset to On tPHL 350 ns CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc 4
Propagation Delay Time Reset to On tPHL 160 ns CL = 50 pF, TA = 25°C; VDD = 10 Vdc 4
Propagation Delay Time Reset to On tPHL 100 ns CL = 50 pF, TA = 25°C; VDD = 15 Vdc 4

CAD (KiCad official)

  • Symbol: MC14060BDG
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mc14060bdg-etched.step / mc14060bdg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc14060bdg.step / mc14060bdg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 3c87d1fb1384af8f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF