MC14060BDG from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Q12	output	Buffered counter output of stage 12, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
2	Q13	output	Buffered counter output of stage 13, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
3	Q14	output	Buffered counter output of stage 14, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
4	Q6	output	Buffered counter output of stage 6, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
5	Q5	output	Buffered counter output of stage 5, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
6	Q7	output	Buffered counter output of stage 7, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
7	Q4	output	Buffered counter output of stage 4, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
8	VSS	power_in	Negative supply (ground) reference for all voltages; Vin and Vout must stay within VSS to VDD.
9	OUT 2	output	Oscillator buffer output 2 used with OUT 1 and CLOCK to build an RC or crystal oscillator; leave open if unused.
10	OUT 1	output	Oscillator buffer output 1 used with OUT 2 and CLOCK to build an RC or crystal oscillator; leave open if unused.
11	CLOCK	input	Schmitt-trigger clock input, where a negative transition advances the counter to the next state and very slow rise and fall times are permitted.
12	RESET	input	Common reset input where a high level places all outputs in the zero state and disables the oscillator.
13	Q9	output	Buffered counter output of stage 9, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
14	Q8	output	Buffered counter output of stage 8, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
15	Q10	output	Buffered counter output of stage 10, able to drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
16	VDD	power_in	Positive supply pin with a supply voltage range of 3.0 V to 18 V and an absolute maximum rating of -0.5 to +18.0 V.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	SOIC-16
Category	Logic ICs
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
DC Supply Voltage Range	VDD	-0.5		18	V	Voltages referenced to VSS	1
Supply Voltage Range	VDD	3		18	V		1
Input or Output Voltage Range (DC or Transient)	Vin, Vout	-0.5			V	Printed as VDD +0.5 V maximum	1
Input or Output Current (DC or Transient) per Pin	Iin, Iout	-10		10	mA	DC or transient, per pin	1
Power Dissipation, per Package	PD			500	mW	Note 1: D/DW packages derate -7.0 mW/°C from 65°C to 125°C	1
Ambient Temperature Range	TA	-55		125	°C		1
Storage Temperature Range	Tstg	-65		150	°C		1
Lead Temperature	TL			260	°C	8 second soldering	1
Output Voltage 0 Level	VOL			0.05	V	Vin = VDD or 0; VDD = 5.0 Vdc	3
Output Voltage 1 Level	VOH	4.95			V	Vin = 0 or VDD; VDD = 5.0 Vdc	3
Output Voltage 1 Level	VOH	9.95			V	Vin = 0 or VDD; VDD = 10 Vdc	3
Output Voltage 1 Level	VOH	14.95			V	Vin = 0 or VDD; VDD = 15 Vdc	3
Input Current	Iin	-0.1		0.1	A	VDD = 15 Vdc, TA = -55°C	3
Input Current	Iin	-1		1	A	VDD = 15 Vdc, TA = 125°C	3
Input Capacitance	Cin		5	7.5	pF	Vin = 0	3
Quiescent Current (Per Package)	IDD			5	A	VDD = 5.0 Vdc, TA = -55°C	3
Quiescent Current (Per Package)	IDD			10	A	VDD = 10 Vdc, TA = -55°C	3
Quiescent Current (Per Package)	IDD			20	A	VDD = 15 Vdc, TA = -55°C	3
Quiescent Current (Per Package)	IDD			150	A	VDD = 5.0 Vdc, TA = 125°C	3
Quiescent Current (Per Package)	IDD			300	A	VDD = 10 Vdc, TA = 125°C	3
Quiescent Current (Per Package)	IDD			600	A	VDD = 15 Vdc, TA = 125°C	3
Output Rise Time (Counter Outputs)	tTLH			200	ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Output Rise Time (Counter Outputs)	tTLH			100	ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Output Rise Time (Counter Outputs)	tTLH			80	ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4
Output Fall Time (Counter Outputs)	tTHL			200	ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Output Fall Time (Counter Outputs)	tTHL			100	ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Output Fall Time (Counter Outputs)	tTHL			80	ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4
Propagation Delay Time Clock to Q4	tPLH			740	ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Propagation Delay Time Clock to Q4	tPLH			300	ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Propagation Delay Time Clock to Q4	tPLH			200	ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4
Clock Pulse Width	twH	100			ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Clock Pulse Width	twH	40			ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Clock Pulse Width	twH	30			ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4
Reset Pulse Width	tw	120			ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Reset Pulse Width	tw	60			ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Reset Pulse Width	tw	40			ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4
Propagation Delay Time Reset to On	tPHL			350	ns	CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc	4
Propagation Delay Time Reset to On	tPHL			160	ns	CL = 50 pF, TA = 25°C; VDD = 10 Vdc	4
Propagation Delay Time Reset to On	tPHL			100	ns	CL = 50 pF, TA = 25°C; VDD = 15 Vdc	4

CAD (KiCad official)

Symbol: MC14060BDG
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: mc14060bdg-etched.step / mc14060bdg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc14060bdg.step / mc14060bdg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (8 pp, sha256 3c87d1fb1384af8f, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MC14060BDG

Verified MC14060BDG

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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