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Ray mc14011bdtr2g: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… 9f60599 14d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "mc14011bdtr2g",
  "title": "MC14011BDTR2G",
  "brief": "onsemi Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "mc14011bdtr2g"
  ],
  "component": {
    "mpn": "MC14011BDTR2G",
    "manufacturer": "onsemi",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/1912131035_onsemi-MC14011BDTR2G_C463300.pdf",
    "parts": {
      "symbol": "mc14011bdtr2g.kicad_sym",
      "footprint": "mc14011bdtr2g.kicad_mod",
      "model_3d": "mc14011bdtr2g-etched.glb",
      "model_3d_plain": "mc14011bdtr2g.glb",
      "model_3d_step": "mc14011bdtr2g-etched.step",
      "model_3d_step_plain": "mc14011bdtr2g.step",
      "lbr": "mc14011bdtr2g.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "IN_1A",
        "type": "input",
        "description": "Gate A input 1. CMOS logic input; VIL max 1.5/3.0/4.0 V and VIH min 3.5/7.0/11 V at VDD = 5/10/15 Vdc. Input current typ 10 pA."
      },
      {
        "number": "2",
        "name": "IN_2A",
        "type": "input",
        "description": "Gate A input 2. CMOS logic input paired with pin 1 to feed NAND gate A whose output is pin 3."
      },
      {
        "number": "3",
        "name": "OUT_A",
        "type": "output",
        "description": "Gate A NAND output = NOT(IN_1A AND IN_2A). Buffered CMOS output; source/sink capability roughly 0.51/0.88 mA typ at VDD = 5 V."
      },
      {
        "number": "4",
        "name": "OUT_B",
        "type": "output",
        "description": "Gate B NAND output = NOT(IN_1B AND IN_2B). Buffered CMOS output."
      },
      {
        "number": "5",
        "name": "IN_1B",
        "type": "input",
        "description": "Gate B input 1. CMOS logic input."
      },
      {
        "number": "6",
        "name": "IN_2B",
        "type": "input",
        "description": "Gate B input 2. CMOS logic input paired with pin 5 to feed NAND gate B."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference for all four gates. All voltages referenced to VSS."
      },
      {
        "number": "8",
        "name": "IN_1C",
        "type": "input",
        "description": "Gate C input 1. CMOS logic input."
      },
      {
        "number": "9",
        "name": "IN_2C",
        "type": "input",
        "description": "Gate C input 2. CMOS logic input paired with pin 8 to feed NAND gate C."
      },
      {
        "number": "10",
        "name": "OUT_C",
        "type": "output",
        "description": "Gate C NAND output = NOT(IN_1C AND IN_2C). Buffered CMOS output."
      },
      {
        "number": "11",
        "name": "OUT_D",
        "type": "output",
        "description": "Gate D NAND output = NOT(IN_1D AND IN_2D). Buffered CMOS output."
      },
      {
        "number": "12",
        "name": "IN_1D",
        "type": "input",
        "description": "Gate D input 1. CMOS logic input."
      },
      {
        "number": "13",
        "name": "IN_2D",
        "type": "input",
        "description": "Gate D input 2. CMOS logic input paired with pin 12 to feed NAND gate D."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply for all four gates. DC supply voltage range 3.0 to 18 Vdc (absolute max -0.5 to +18 V). Quiescent current typ 0.5 nA (5 V) to 1.5 nA (15 V) per package."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/1912131035_onsemi-MC14011BDTR2G_C463300.pdf",
        "pages": 11,
        "sha256": "9ca14896296eb906",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4011",
      "logic_family": "CD4000",
      "function_code": "4011",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NAND Gate",
      "manufacturer": "Onsemi (Motorola legacy)",
      "is_specialty": false
    },
    "models_3d": [
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        "file": "mc14011bdtr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "mc14011bdtr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          5.0,
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c245aa7b23ffa5ab1e09617c504c8446ca95716258f84198f7abd4f03034ca07",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [
    {
      "mpn": "MC14011BDTR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC14011BDTR2GDTG",
      "kind": "packaging"
    },
    {
      "mpn": "MC14011BDTR2GDR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC14011BDTR2GDG",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "mc14011bdtr2g"
  ],
  "discovery_pitch": "MC14011BDTR2G (onsemi) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "mc14011bdtr2g.kicad_sym",
    "mc14011bdtr2g.kicad_mod",
    "mc14011bdtr2g.glb",
    "mc14011bdtr2g.step",
    "mc14011bdtr2g.lbr",
    "docs/hero.png",
    "docs/mc14011bdtr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-28T18:41:14.384Z"
}