component
MAX96724FGTN
Public Made by Adomby adom
Analog Devices Inc./Maxim Integrated Serializers / Deserializers, TQFN-56(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "max96724fgtn",
"title": "MAX96724FGTN",
"brief": "Analog Devices Inc./Maxim Integrated Serializers / Deserializers, TQFN-56(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"communication interface chip-uart-485-232",
"max96724fgtn",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "MAX96724FGTN",
"manufacturer": "Analog Devices Inc./Maxim Integrated",
"package": "TQFN-56(8x8)",
"pin_count": 57,
"category": "Communication Interface Chip/UART/485/232",
"subcategory": "Serializers / Deserializers",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/max96724f.pdf",
"parts": {
"symbol": "max96724fgtn.kicad_sym",
"footprint": "max96724fgtn.kicad_mod",
"model_3d": "max96724fgtn-hero.glb",
"model_3d_plain": "max96724fgtn-etched.glb",
"model_3d_step": "max96724fgtn-etched.step",
"model_3d_step_plain": "max96724fgtn.step",
"lbr": "max96724fgtn.lbr"
},
"distributor_links": {
"lcsc": "C7458192"
},
"distributor_check": {
"checked_at": "2026-10-28T16:11:21Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "MFP0",
"type": "bidirectional",
"description": "Multifunction pin 0 (FSYNC, LMN0 or GPIO0), disabled as high-impedance with a 1 MΩ pulldown at power-up."
},
{
"number": "2",
"name": "MFP1",
"type": "bidirectional",
"description": "Multifunction pin 1 (VSYNC0/DE0/HSYNC0, LMN1 or GPIO1), disabled as high-impedance at power-up."
},
{
"number": "3",
"name": "MFP2",
"type": "bidirectional",
"description": "Multifunction pin 2 (LMN2, GPIO2 or CNTL1/CNTL3 in GMSL1 mode), disabled as high-impedance at power-up."
},
{
"number": "4",
"name": "CFG0",
"type": "input",
"description": "Configuration input latched at power-up through an external resistor divider from VDDIO to set the I2C address and mode (Table 7)."
},
{
"number": "5",
"name": "SIODP",
"type": "bidirectional",
"description": "Noninverted GMSL2/GMSL1 serial-data I/O D."
},
{
"number": "6",
"name": "SIODN",
"type": "bidirectional",
"description": "Inverted GMSL2/GMSL1 serial-data I/O D."
},
{
"number": "7",
"name": "VDD18",
"type": "power_in",
"description": "1.8V analog supply, specified 1.7V to 1.9V."
},
{
"number": "8",
"name": "CAP_VDD",
"type": "power_in",
"description": "Decoupling for the VDD core supply."
},
{
"number": "9",
"name": "SIOCN",
"type": "bidirectional",
"description": "Inverted GMSL2/GMSL1 serial-data I/O C."
},
{
"number": "10",
"name": "SIOCP",
"type": "bidirectional",
"description": "Noninverted GMSL2/GMSL1 serial-data I/O C."
},
{
"number": "11",
"name": "PWDNB",
"type": "input",
"description": "Active-low power-down input with a 1 MΩ internal pulldown; set low to enter power-down and attach a pullup to VDDIO for normal operation."
},
{
"number": "12",
"name": "MFP3",
"type": "bidirectional",
"description": "Multifunction pin 3 (VSYNC1/DE1/HSYNC1, LMN3 or GPIO3), disabled as high-impedance at power-up."
},
{
"number": "13",
"name": "MFP4",
"type": "bidirectional",
"description": "Multifunction pin 4, LOCK output (open-drain with 40 kΩ pullup to VDDIO) by default, or GPIO4."
},
{
"number": "14",
"name": "MFP5",
"type": "bidirectional",
"description": "Multifunction pin 5, ERRB output (open-drain with 40 kΩ pullup to VDDIO) by default, or GPIO5."
},
{
"number": "15",
"name": "X1/OSC",
"type": "input",
"description": "25 MHz crystal or clock source input."
},
{
"number": "16",
"name": "X2",
"type": "passive",
"description": "Connect to the 25 MHz crystal; must be left floating when an external oscillator drives X1/OSC."
},
{
"number": "17",
"name": "XRES",
"type": "passive",
"description": "Connect a 402 Ω 1% resistor to ground."
},
{
"number": "18",
"name": "SIOBP",
"type": "bidirectional",
"description": "Noninverted GMSL2/GMSL1 serial-data I/O B."
},
{
"number": "19",
"name": "SIOBN",
"type": "bidirectional",
"description": "Inverted GMSL2/GMSL1 serial-data I/O B."
},
{
"number": "20",
"name": "CAP_VDD",
"type": "power_in",
"description": "Decoupling for the VDD core supply."
},
{
"number": "21",
"name": "VDD18",
"type": "power_in",
"description": "1.8V analog supply, specified 1.7V to 1.9V."
},
{
"number": "22",
"name": "SIOAN",
"type": "bidirectional",
"description": "Inverted GMSL2/GMSL1 serial-data I/O A."
},
{
"number": "23",
"name": "SIOAP",
"type": "bidirectional",
"description": "Noninverted GMSL2/GMSL1 serial-data I/O A."
},
{
"number": "24",
"name": "VDDIO",
"type": "power_in",
"description": "3.3V or 1.8V I/O power supply, specified 1.7V to 3.6V."
},
{
"number": "25",
"name": "CFG1/MFP6",
"type": "bidirectional",
"description": "Configuration input CFG1 latched at power-up (Table 8), which becomes multifunction pin MFP6 (GPO6) after latching."
},
{
"number": "26",
"name": "SDA1/MFP7",
"type": "bidirectional",
"description": "I2C data 1, open-drain with 40 kΩ pullup to VDDIO, or alternate function/GPIO7."
},
{
"number": "27",
"name": "SCL1/MFP8",
"type": "bidirectional",
"description": "I2C clock 1, open-drain output with 40 kΩ pullup to VDDIO, or GPIO8."
},
{
"number": "28",
"name": "SDA",
"type": "bidirectional",
"description": "I2C data, open-drain with 40 kΩ pullup to VDDIO."
},
{
"number": "29",
"name": "SCL",
"type": "bidirectional",
"description": "I2C clock, open-drain with 40 kΩ pullup to VDDIO."
},
{
"number": "30",
"name": "VTERM",
"type": "power_in",
"description": "1.2V CSI C/D-PHY supply, specified 1.14V to 1.26V."
},
{
"number": "31",
"name": "DA0P",
"type": "output",
"description": "D-PHY Port A data lane 0 positive output (4-lane mode), or C-PHY Port A lane 0 output A."
},
{
"number": "32",
"name": "DA0N",
"type": "output",
"description": "D-PHY Port A data lane 0 negative output (4-lane mode), or C-PHY Port A lane 0 output B."
},
{
"number": "33",
"name": "CKCP",
"type": "output",
"description": "D-PHY Port C clock lane positive output (2-lane mode); disabled in 4-lane mode."
},
{
"number": "34",
"name": "CKCN",
"type": "output",
"description": "D-PHY Port C clock lane negative output (2-lane mode); disabled in 4-lane mode."
},
{
"number": "35",
"name": "DA1P",
"type": "output",
"description": "D-PHY Port A data lane 1 positive output (4-lane mode), or C-PHY Port A lane 1 output B."
},
{
"number": "36",
"name": "DA1N",
"type": "output",
"description": "D-PHY Port A data lane 1 negative output (4-lane mode), or C-PHY Port A lane 1 output C."
},
{
"number": "37",
"name": "DA2P",
"type": "output",
"description": "D-PHY Port A data lane 2 positive output (4-lane mode), or C-PHY Port A lane 2 output A."
},
{
"number": "38",
"name": "DA2N",
"type": "output",
"description": "D-PHY Port A data lane 2 negative output (4-lane mode), or C-PHY Port A lane 2 output B."
},
{
"number": "39",
"name": "CKAP",
"type": "output",
"description": "D-PHY Port A clock lane positive output (4-lane mode)."
},
{
"number": "40",
"name": "CKAN",
"type": "output",
"description": "D-PHY Port A clock lane negative output (4-lane mode)."
},
{
"number": "41",
"name": "DA3P",
"type": "output",
"description": "D-PHY Port A data lane 3 positive output (4-lane mode), or C-PHY Port A lane 3 output B."
},
{
"number": "42",
"name": "DA3N",
"type": "output",
"description": "D-PHY Port A data lane 3 negative output (4-lane mode), or C-PHY Port A lane 3 output C."
},
{
"number": "43",
"name": "DB0P",
"type": "output",
"description": "D-PHY Port B data lane 0 positive output (4-lane mode), or C-PHY Port B lane 0 output A."
},
{
"number": "44",
"name": "DB0N",
"type": "output",
"description": "D-PHY Port B data lane 0 negative output (4-lane mode), or C-PHY Port B lane 0 output B."
},
{
"number": "45",
"name": "CKBP",
"type": "output",
"description": "D-PHY Port B clock lane positive output (4-lane mode)."
},
{
"number": "46",
"name": "CKBN",
"type": "output",
"description": "D-PHY Port B clock lane negative output (4-lane mode)."
},
{
"number": "47",
"name": "DB1P",
"type": "output",
"description": "D-PHY Port B data lane 1 positive output (4-lane mode), or C-PHY Port B lane 1 output B."
},
{
"number": "48",
"name": "DB1N",
"type": "output",
"description": "D-PHY Port B data lane 1 negative output (4-lane mode), or C-PHY Port B lane 1 output C."
},
{
"number": "49",
"name": "DB2P",
"type": "output",
"description": "D-PHY Port B data lane 2 positive output (4-lane mode), or C-PHY Port B lane 2 output A."
},
{
"number": "50",
"name": "DB2N",
"type": "output",
"description": "D-PHY Port B data lane 2 negative output (4-lane mode), or C-PHY Port B lane 2 output B."
},
{
"number": "51",
"name": "CKFP",
"type": "output",
"description": "D-PHY Port F clock lane positive output (2-lane mode); disabled in 4-lane mode."
},
{
"number": "52",
"name": "CKFN",
"type": "output",
"description": "D-PHY Port F clock lane negative output (2-lane mode); disabled in 4-lane mode."
},
{
"number": "53",
"name": "DB3P",
"type": "output",
"description": "D-PHY Port B data lane 3 positive output (4-lane mode), or C-PHY Port B lane 3 output B."
},
{
"number": "54",
"name": "DB3N",
"type": "output",
"description": "D-PHY Port B data lane 3 negative output (4-lane mode), or C-PHY Port B lane 3 output C."
},
{
"number": "55",
"name": "VDD",
"type": "power_in",
"description": "1.2V or 1.0V core supply; 1.2V uses an internal regulator and 1.0V bypasses it."
},
{
"number": "56",
"name": "VDD",
"type": "power_in",
"description": "1.2V or 1.0V core supply; 1.2V uses an internal regulator and 1.0V bypasses it."
},
{
"number": "57",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MAX96724FGTN/V+ is the non-wettable 56-pin TQFN-EP (package code T5688+6C, outline 21-0135). Pin nam"
],
"pages_sent": 50,
"cost_usd": 0.1064,
"at": "2026-10-28T16:10:57"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/max96724f.pdf",
"pages": 474,
"sha256": "3182d34d76afe981",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 57,
"described": 57,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "max96724fgtn.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "54eb482f12c9d8b70c1bfc78306a1c34f412f3556e225cbd097840e5abdb7981",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "max96724fgtn-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "9831d29ce0f8c5b5c60c3c10b48fa283a202bf8f39316208c4c154882a83fbff",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices Inc./Maxim Integrated",
"Package": "TQFN-56(8x8)",
"Category": "Communication Interface Chip/UART/485/232",
"Pins": "57"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "3182d34d76afe9816a650f72a491adbc4f065eac4bbbbc65c4f696b5f7ca2187",
"rows": [
{
"name": "Output Voltage Swing (Single-ended)",
"symbol": "VO",
"kind": "electrical",
"unit": "mV",
"min": 190,
"typ": 250,
"max": 310,
"conditions": "RL = 100Ω ±1%",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Output Voltage Swing (Differential)",
"symbol": "VODT",
"kind": "electrical",
"unit": "mV",
"min": 380,
"typ": 500,
"max": 620,
"conditions": "RL = 100Ω ±1%, peak-to-peak differential voltage",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Change in VOD between Complementary Output States",
"symbol": "ΔVOD",
"kind": "electrical",
"unit": "mV",
"min": null,
"typ": null,
"max": 25,
"conditions": "RL = 100Ω ±1%, |VOD(H) − VOD(L)|",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Change in VOS between Complementary Output States",
"symbol": "ΔVOS",
"kind": "electrical",
"unit": "mV",
"min": null,
"typ": null,
"max": 25,
"conditions": "RL = 100Ω ±1%, |VOS(H) − VOS(L)|",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Termination Resistance (Internal), GMSL2 reverse channel",
"symbol": "RT",
"kind": "electrical",
"unit": "Ω",
"min": 50,
"typ": 55,
"max": 60,
"conditions": "Any Pin to VDD18",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Termination Resistance (Internal), GMSL1 reverse channel",
"symbol": "RT",
"kind": "electrical",
"unit": "Ω",
"min": 50,
"typ": 55,
"max": 60,
"conditions": "Any Pin to VDD18",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Differential High Output Peak Voltage, HIM disabled",
"symbol": "VRODH",
"kind": "electrical",
"unit": "mV",
"min": 30,
"typ": null,
"max": 70,
"conditions": "Forward channel disabled, STP mode, RL=100Ω, HIM disabled",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Differential High Output Peak Voltage, HIM enabled",
"symbol": "VRODH",
"kind": "electrical",
"unit": "mV",
"min": 50,
"typ": null,
"max": 110,
"conditions": "Forward channel disabled, STP mode, RL=100Ω, HIM enabled",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Differential Low Output Peak Voltage, HIM disabled",
"symbol": "VRODL",
"kind": "electrical",
"unit": "mV",
"min": -70,
"typ": null,
"max": -30,
"conditions": "Forward channel disabled, STP mode, RL=100Ω, HIM disabled",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Differential Low Output Peak Voltage, HIM enabled",
"symbol": "VRODL",
"kind": "electrical",
"unit": "mV",
"min": -110,
"typ": null,
"max": -50,
"conditions": "Forward channel disabled, STP mode, RL=100Ω, HIM enabled",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Thevenin High-Level Output Voltage (LP transmitter)",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
"min": 0.95,
"typ": 1.2,
"max": 1.3,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Thevenin Low-Level Output Voltage (LP transmitter)",
"symbol": "VOL",
"kind": "electrical",
"unit": "mV",
"min": -50,
"typ": null,
"max": 50,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "HS Transmit Static Common-Mode Voltage (D-PHY)",
"symbol": "VCMTX",
"kind": "electrical",
"unit": "mV",
"min": 150,
"typ": 200,
"max": 250,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "VCMTX Mismatch when Output is Differential-1 or Differential-0 (D-PHY)",
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