component
MAX6324BUT29+T
Public Made by Adomby adom
Maxim Integrated Monitors & Reset Circuits, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MAX6324BUT29+T
Maxim Integrated · Monitors & Reset Circuits · SOT-23-6
MAX6324BUT29+T from Maxim Integrated, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Active-low manual reset input that asserts RESET low and clears the watchdog timer when pulled low for at least 1µs; it is internally pulled up to VCC, so it can be left unconnected or tied to VCC if unused. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | WDI | input | Watchdog input whose falling edges must arrive within the factory-trimmed window; edges that are too fast or too slow cause WDPO to pulse low for 1ms (typ). |
| 4 | VCC | power_in | Supply voltage input (operating range 1.2V to 5.5V) that also feeds the VCC reset monitor; bypass with at least 500pF in noisy systems. |
| 5 | WDPO | output | Open-drain watchdog pulse output that is pulsed low for 1ms (typ) on a fast or slow watchdog fault and is active only while RESET is high; connect a pullup to any supply up to +6V. |
| 6 | RESET | output | Active-low open-drain reset output that is asserted when VCC falls below VTH or MR is low and stays asserted for the reset timeout (at least 100ms) after VCC rises above VTH; connect a pullup to any supply up to +6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 1.2 | 5.5 | V | 3 | ||
| Supply Current | ICC | 23 | 45 | µA | No load, RESET deasserted; VCC = 2.5V or 3.3V | 3 | |
| Supply Current | ICC | 27 | 57 | µA | No load, RESET deasserted; VCC = 5.5 | 3 | |
| Reset Threshold Voltage | VTH | 2.85 | 2.93 | 3 | V | MAX632_ _UT29 | 3 |
| Reset Timeout Delay | tRP | 100 | 180 | 280 | ms | RESET deasserted | 3 |
| WDPO, RESET Output Voltage VOL | VOL | 0.4 | V | ISINK = 1.2mA, VCC = 2.25V (MAX632_ UT23, MAX632 UT26, MAX632 UT29, MAX632 _UT31) | 3 | ||
| WDPO, RESET Output Leakage | ILKG | 1 | µA | VRESET = VWDPO = +5.5V, RESET, WDPO deasserted | 3 | ||
| Watchdog Timeout (Fast), suffix B | tWD1 | 10 | 15 | ms | Notes 2, 3; MAX632_BUT_ _ | 4 | |
| Watchdog Timeout (Slow), suffix B | tWD2 | 100 | 150 | ms | Note 4; MAX632_BUT_ _ | 4 | |
| Minimum Watchdog Input Pulse Width | 300 | ns | 4 | ||||
| WDI Input Voltage VIH | VIH | 0.75 | x VCC | 4 | |||
| WDI Input Voltage VIL | VIL | 0.8 | V | 4 | |||
| WDI Input Current | -1.5 | -1 | µA | VWDI = 0V | 4 | ||
| WDI Input Current | 1 | 1.5 | µA | VWDI = VCC | 4 | ||
| WDPO Pulse Width | 0.5 | 1 | 3 | ms | VIL = 0.8V, VIH = 0.75V x VCC | 4 | |
| MR Input Voltage VIH | VIH | 0.7 | x VCC | 4 | |||
| MR Input Voltage VIL | VIL | 0.3 | x VCC | 4 | |||
| MR Minimum Pulse Width | 1 | µs | 4 | ||||
| MR Pullup Resistance | 50 | 85 | kΩ | 4 | |||
| VCC Absolute Terminal Voltage | VCC | -0.3 | 6 | V | with respect to GND | 2 | |
| MR, WDI Terminal Voltage | -0.3 | V | with respect to GND; maximum is VCC + 0.3V (MAX6324) | 2 | |||
| WDPO, RESET Terminal Voltage (MAX6324) | -0.3 | 6 | V | with respect to GND | 2 | ||
| Input Current, VCC, WDI, MR | 20 | mA | 2 | ||||
| Output Current, RESET, WDPO | 20 | mA | 2 | ||||
| Rate of Rise, VCC | 100 | V/µs | 2 | ||||
| Operating Temperature Range | -40 | 125 | °C | 2 | |||
| Junction Temperature | 150 | °C | 2 | ||||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature (soldering, 10s) | 300 | °C | soldering, 10s | 2 | |||
| Soldering Temperature (reflow), Lead(Pb)-Free | 260 | °C | 2 | ||||
| Soldering Temperature (reflow), Containing Lead | 240 | °C | 2 | ||||
| Thermal Resistance, Junction to Case, Single-Layer Board | θJC | 80 | °C/W | JESD51-7, single-layer board | 2 | ||
| Thermal Resistance, Junction to Ambient, Multi-Layer Board | θJA | 115 | °C/W | JESD51-7, four-layer board | 2 | ||
| Thermal Resistance, Junction to Case, Multi-Layer Board | θJC | 80 | °C/W | JESD51-7, four-layer board | 2 |
CAD (KiCad official)
- Symbol:
MAX6324BUT29+T - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
max6324but29-t-etched.step/max6324but29-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max6324but29-t.step/max6324but29-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (14 pp, sha256
fbe6156c96c1fb0f, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).