component
MAX4472ESD+
Public Made by Adomby adom
Maxim Integrated Pre-ordered Chips, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX4472ESD+
Maxim Integrated · Pre-ordered Chips · SOIC-14
MAX4472ESD+ from Maxim Integrated, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Channel A amplifier output, which swings rail-to-rail and can source and sink 11mA with a +5V supply. |
| 2 | INA- | input | Channel A inverting amplifier input. |
| 3 | INA+ | input | Channel A noninverting amplifier input; the common-mode input range extends down to VSS (ground sensing). |
| 4 | VDD | power_in | Positive power-supply voltage; the device operates from a single +1.8V to +5.5V supply. |
| 5 | INB+ | input | Channel B noninverting amplifier input. |
| 6 | INB- | input | Channel B inverting amplifier input. |
| 7 | OUTB | output | Channel B amplifier output, which swings rail-to-rail. |
| 8 | OUTC | output | Channel C amplifier output, which swings rail-to-rail. |
| 9 | INC- | input | Channel C inverting amplifier input. |
| 10 | INC+ | input | Channel C noninverting amplifier input. |
| 11 | VSS | power_in | Negative power-supply voltage (ground reference for the single supply); the input common-mode range extends down to VSS. |
| 12 | IND+ | input | Channel D noninverting amplifier input. |
| 13 | IND- | input | Channel D inverting amplifier input. |
| 14 | OUTD | output | Channel D amplifier output, which swings rail-to-rail. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOIC-14 |
| Category | Interface ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | 5.5 | V | Guaranteed by PSRR tests | 2 | |
| Supply Current (Per Amplifier) | IDD | 0.75 | 1.2 | µA | VDD = +5.0V | 2 | |
| Input Offset Voltage | VOS | -7 | 0.5 | 7 | mV | 2 | |
| Input Bias Current | IB | -1500 | 200 | 1500 | pA | 2 | |
| Common-Mode Rejection Ratio | CMRR | 70 | 95 | dB | Specified with VSS ≤ VCM ≤ (VDD - 1.1V) | 2 | |
| Power-Supply Rejection Ratio | PSRR | 70 | 90 | dB | +1.8V ≤ VDD ≤ +5.5V | 2 | |
| Large-Signal Voltage Gain | AVOL | 90 | 120 | dB | RL = 1MΩ, VOUT = 50mV to VDD - 50mV | 2 | |
| Large-Signal Voltage Gain | AVOL | 90 | 112 | dB | RL = 100kΩ, VOUT = 200mV to VDD - 200mV | 2 | |
| Large-Signal Voltage Gain | AVOL | 100 | dB | RL = 10kΩ, VOUT = 200mV to VDD - 200mV | 2 | ||
| Output Voltage Swing High (VDD - VOH) | VOH | 14 | mV | RL = 1MΩ | 2 | ||
| Output Voltage Swing High (VDD - VOH) | VOH | 4 | 10 | mV | RL = 100kΩ | 2 | |
| Output Voltage Swing High (VDD - VOH) | VOH | 40 | mV | RL = 10kΩ | 2 | ||
| Output Voltage Swing Low (VOL - VSS) | VOL | 0.5 | 5 | mV | RL = 1MΩ | 2 | |
| Output Voltage Swing Low (VOL - VSS) | VOL | 15 | mV | RL = 100kΩ | 2 | ||
| Output Voltage Swing Low (VOL - VSS) | VOL | 10 | mV | RL = 10kΩ | 2 | ||
| Capacitive Load | CLOAD | 250 | pF | No sustained oscillations | 3 | ||
| Supply Voltage Range | VDD | 1.8 | 5.5 | V | TA = TMIN to TMAX; Guaranteed by PSRR tests | 3 | |
| Supply Current (Per Amplifier) | IDD | 1.5 | µA | VDD = +5.0V; TA = TMIN to TMAX | 3 | ||
| Input Offset Voltage | VOS | -15 | 15 | mV | TA = TMIN to TMAX | 3 | |
| Input Bias Current | IB | 4.25 | nA | TA = TMIN to TMAX | 3 | ||
| Common-Mode Rejection Ratio | CMRR | 56 | dB | VSS ≤ VCM ≤ (VDD - 1.1V); TA = TMIN to TMAX | 3 | ||
| Power-Supply Rejection Ratio | PSRR | 65 | dB | +1.8V ≤ VDD ≤ +5.5V, 0°C ≤ TA ≤ +85°C | 3 | ||
| Large-Signal Voltage Gain | AVOL | 75 | dB | VOUT = 50mV to VDD - 50mV, RL = 1MΩ; TA = TMIN to TMAX | 3 | ||
| Output Voltage Swing High (VDD - VOH) | VOH | 5 | mV | RL = 1MΩ; TA = TMIN to TMAX | 3 | ||
| Output Voltage Swing High (VDD - VOH) | VOH | 15 | mV | RL = 100kΩ; TA = TMIN to TMAX | 3 | ||
| Output Voltage Swing Low (VOL - VSS) | VOL | 5 | mV | RL = 1MΩ; TA = TMIN to TMAX | 3 | ||
| VDD to VSS | VDD-VSS | -0.3 | 6 | V | 2 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature (soldering, 10s) | TLEAD | 300 | °C | soldering, 10s | 2 | ||
| Soldering Temperature (reflow) | TSOLDER | 260 | °C | reflow | 2 |
CAD (KiCad official)
- Symbol:
MAX4472ESD+ - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
max4472esd-etched.step/max4472esd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max4472esd.step/max4472esd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (19 pp, sha256
23dad23272985f10, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX4472ESD+
**Maxim Integrated** · Pre-ordered Chips · SOIC-14
MAX4472ESD+ from Maxim Integrated, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Channel A amplifier output, which swings rail-to-rail and can source and sink 11mA with a +5V supply. |
| 2 | INA- | input | Channel A inverting amplifier input. |
| 3 | INA+ | input | Channel A noninverting amplifier input; the common-mode input range extends down to VSS (ground sensing). |
| 4 | VDD | power_in | Positive power-supply voltage; the device operates from a single +1.8V to +5.5V supply. |
| 5 | INB+ | input | Channel B noninverting amplifier input. |
| 6 | INB- | input | Channel B inverting amplifier input. |
| 7 | OUTB | output | Channel B amplifier output, which swings rail-to-rail. |
| 8 | OUTC | output | Channel C amplifier output, which swings rail-to-rail. |
| 9 | INC- | input | Channel C inverting amplifier input. |
| 10 | INC+ | input | Channel C noninverting amplifier input. |
| 11 | VSS | power_in | Negative power-supply voltage (ground reference for the single supply); the input common-mode range extends down to VSS. |
| 12 | IND+ | input | Channel D noninverting amplifier input. |
| 13 | IND- | input | Channel D inverting amplifier input. |
| 14 | OUTD | output | Channel D amplifier output, which swings rail-to-rail. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOIC-14 |
| Category | Interface ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | | 5.5 | V | Guaranteed by PSRR tests | 2 |
| Supply Current (Per Amplifier) | IDD | | 0.75 | 1.2 | µA | VDD = +5.0V | 2 |
| Input Offset Voltage | VOS | -7 | 0.5 | 7 | mV | | 2 |
| Input Bias Current | IB | -1500 | 200 | 1500 | pA | | 2 |
| Common-Mode Rejection Ratio | CMRR | 70 | 95 | | dB | Specified with VSS ≤ VCM ≤ (VDD - 1.1V) | 2 |
| Power-Supply Rejection Ratio | PSRR | 70 | 90 | | dB | +1.8V ≤ VDD ≤ +5.5V | 2 |
| Large-Signal Voltage Gain | AVOL | 90 | 120 | | dB | RL = 1MΩ, VOUT = 50mV to VDD - 50mV | 2 |
| Large-Signal Voltage Gain | AVOL | 90 | 112 | | dB | RL = 100kΩ, VOUT = 200mV to VDD - 200mV | 2 |
| Large-Signal Voltage Gain | AVOL | 100 | | | dB | RL = 10kΩ, VOUT = 200mV to VDD - 200mV | 2 |
| Output Voltage Swing High (VDD - VOH) | VOH | | | 14 | mV | RL = 1MΩ | 2 |
| Output Voltage Swing High (VDD - VOH) | VOH | | 4 | 10 | mV | RL = 100kΩ | 2 |
| Output Voltage Swing High (VDD - VOH) | VOH | | | 40 | mV | RL = 10kΩ | 2 |
| Output Voltage Swing Low (VOL - VSS) | VOL | | 0.5 | 5 | mV | RL = 1MΩ | 2 |
| Output Voltage Swing Low (VOL - VSS) | VOL | | | 15 | mV | RL = 100kΩ | 2 |
| Output Voltage Swing Low (VOL - VSS) | VOL | | | 10 | mV | RL = 10kΩ | 2 |
| Capacitive Load | CLOAD | 250 | | | pF | No sustained oscillations | 3 |
| Supply Voltage Range | VDD | 1.8 | | 5.5 | V | TA = TMIN to TMAX; Guaranteed by PSRR tests | 3 |
| Supply Current (Per Amplifier) | IDD | | | 1.5 | µA | VDD = +5.0V; TA = TMIN to TMAX | 3 |
| Input Offset Voltage | VOS | -15 | | 15 | mV | TA = TMIN to TMAX | 3 |
| Input Bias Current | IB | | | 4.25 | nA | TA = TMIN to TMAX | 3 |
| Common-Mode Rejection Ratio | CMRR | 56 | | | dB | VSS ≤ VCM ≤ (VDD - 1.1V); TA = TMIN to TMAX | 3 |
| Power-Supply Rejection Ratio | PSRR | 65 | | | dB | +1.8V ≤ VDD ≤ +5.5V, 0°C ≤ TA ≤ +85°C | 3 |
| Large-Signal Voltage Gain | AVOL | 75 | | | dB | VOUT = 50mV to VDD - 50mV, RL = 1MΩ; TA = TMIN to TMAX | 3 |
| Output Voltage Swing High (VDD - VOH) | VOH | | | 5 | mV | RL = 1MΩ; TA = TMIN to TMAX | 3 |
| Output Voltage Swing High (VDD - VOH) | VOH | | | 15 | mV | RL = 100kΩ; TA = TMIN to TMAX | 3 |
| Output Voltage Swing Low (VOL - VSS) | VOL | | | 5 | mV | RL = 1MΩ; TA = TMIN to TMAX | 3 |
| VDD to VSS | VDD-VSS | -0.3 | | 6 | V | | 2 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 2 |
| Junction Temperature | TJ | | | 150 | °C | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Lead Temperature (soldering, 10s) | TLEAD | | | 300 | °C | soldering, 10s | 2 |
| Soldering Temperature (reflow) | TSOLDER | | | 260 | °C | reflow | 2 |
## CAD (KiCad official)
- Symbol: `MAX4472ESD+`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `max4472esd-etched.step` / `max4472esd-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max4472esd.step` / `max4472esd.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Maxim Integrated datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/max4464-max4474.pdf) (19 pp, sha256 `23dad23272985f10`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max4472esd-datasheet.pdf)