component

MAX4472ESD+

Public Made by Adom

by adom

Maxim Integrated Pre-ordered Chips, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsmax4472esd+factory-2.0.0extractor-text

Verified MAX4472ESD+

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MAX4472ESD+ · SOIC-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 19-page datasheet
  • ✓distributor: lcsc C1347344, digikey MAX4472ESD+-ND, mouser 700-MAX4472ESD
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-hkdjn3zc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ max4472esd.kicad_sym✓ max4472esd.kicad_mod✓ max4472esd.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers max4472esd: viewers · Ray 10d ago
max4472esd-etched.glb Publish 0.1.0 · Ray 10d ago
max4472esd-etched.step max4472esd: factory component page (tier=mfr) · Ray 10d ago
max4472esd-hero.glb max4472esd: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
max4472esd-hero.overlay.json Publish 0.1.0 · Ray 10d ago
max4472esd.glb Publish 0.1.0 · Ray 10d ago
max4472esd.kicad_mod Publish 0.1.0 · Ray 10d ago
max4472esd.kicad_sym Publish 0.1.0 · Ray 10d ago
max4472esd.lbr Publish 0.1.0 · Ray 10d ago
max4472esd.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 10d ago

MAX4472ESD+

Maxim Integrated · Pre-ordered Chips · SOIC-14

MAX4472ESD+ from Maxim Integrated, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Channel A amplifier output, which swings rail-to-rail and can source and sink 11mA with a +5V supply.
2 INA- input Channel A inverting amplifier input.
3 INA+ input Channel A noninverting amplifier input; the common-mode input range extends down to VSS (ground sensing).
4 VDD power_in Positive power-supply voltage; the device operates from a single +1.8V to +5.5V supply.
5 INB+ input Channel B noninverting amplifier input.
6 INB- input Channel B inverting amplifier input.
7 OUTB output Channel B amplifier output, which swings rail-to-rail.
8 OUTC output Channel C amplifier output, which swings rail-to-rail.
9 INC- input Channel C inverting amplifier input.
10 INC+ input Channel C noninverting amplifier input.
11 VSS power_in Negative power-supply voltage (ground reference for the single supply); the input common-mode range extends down to VSS.
12 IND+ input Channel D noninverting amplifier input.
13 IND- input Channel D inverting amplifier input.
14 OUTD output Channel D amplifier output, which swings rail-to-rail.

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package SOIC-14
Category Interface ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VDD 1.8 5.5 V Guaranteed by PSRR tests 2
Supply Current (Per Amplifier) IDD 0.75 1.2 µA VDD = +5.0V 2
Input Offset Voltage VOS -7 0.5 7 mV 2
Input Bias Current IB -1500 200 1500 pA 2
Common-Mode Rejection Ratio CMRR 70 95 dB Specified with VSS ≤ VCM ≤ (VDD - 1.1V) 2
Power-Supply Rejection Ratio PSRR 70 90 dB +1.8V ≤ VDD ≤ +5.5V 2
Large-Signal Voltage Gain AVOL 90 120 dB RL = 1MΩ, VOUT = 50mV to VDD - 50mV 2
Large-Signal Voltage Gain AVOL 90 112 dB RL = 100kΩ, VOUT = 200mV to VDD - 200mV 2
Large-Signal Voltage Gain AVOL 100 dB RL = 10kΩ, VOUT = 200mV to VDD - 200mV 2
Output Voltage Swing High (VDD - VOH) VOH 14 mV RL = 1MΩ 2
Output Voltage Swing High (VDD - VOH) VOH 4 10 mV RL = 100kΩ 2
Output Voltage Swing High (VDD - VOH) VOH 40 mV RL = 10kΩ 2
Output Voltage Swing Low (VOL - VSS) VOL 0.5 5 mV RL = 1MΩ 2
Output Voltage Swing Low (VOL - VSS) VOL 15 mV RL = 100kΩ 2
Output Voltage Swing Low (VOL - VSS) VOL 10 mV RL = 10kΩ 2
Capacitive Load CLOAD 250 pF No sustained oscillations 3
Supply Voltage Range VDD 1.8 5.5 V TA = TMIN to TMAX; Guaranteed by PSRR tests 3
Supply Current (Per Amplifier) IDD 1.5 µA VDD = +5.0V; TA = TMIN to TMAX 3
Input Offset Voltage VOS -15 15 mV TA = TMIN to TMAX 3
Input Bias Current IB 4.25 nA TA = TMIN to TMAX 3
Common-Mode Rejection Ratio CMRR 56 dB VSS ≤ VCM ≤ (VDD - 1.1V); TA = TMIN to TMAX 3
Power-Supply Rejection Ratio PSRR 65 dB +1.8V ≤ VDD ≤ +5.5V, 0°C ≤ TA ≤ +85°C 3
Large-Signal Voltage Gain AVOL 75 dB VOUT = 50mV to VDD - 50mV, RL = 1MΩ; TA = TMIN to TMAX 3
Output Voltage Swing High (VDD - VOH) VOH 5 mV RL = 1MΩ; TA = TMIN to TMAX 3
Output Voltage Swing High (VDD - VOH) VOH 15 mV RL = 100kΩ; TA = TMIN to TMAX 3
Output Voltage Swing Low (VOL - VSS) VOL 5 mV RL = 1MΩ; TA = TMIN to TMAX 3
VDD to VSS VDD-VSS -0.3 6 V 2
Operating Temperature Range TA -40 85 °C 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (soldering, 10s) TLEAD 300 °C soldering, 10s 2
Soldering Temperature (reflow) TSOLDER 260 °C reflow 2

CAD (KiCad official)

  • Symbol: MAX4472ESD+
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: max4472esd-etched.step / max4472esd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max4472esd.step / max4472esd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (19 pp, sha256 23dad23272985f10, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF