MAX14921ECS+T

{
  "slug": "max14921ecs-t",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Inc Maxim Integrated Battery Management, TQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "max14921ecs+t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "max14921ecs-t.kicad_sym",
    "max14921ecs-t.kicad_mod",
    "max14921ecs-t.glb",
    "max14921ecs-t.step",
    "max14921ecs-t.lbr",
    "docs/hero.png",
    "docs/max14921ecs-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "max14921ecs-t-hero.glb",
    "max14921ecs-t-hero.overlay.json",
    "max14921ecs-t-etched.glb"
  ],
  "component": {
    "mpn": "MAX14921ECS+T",
    "manufacturer": "Analog Devices Inc Maxim Integrated",
    "package": "TQFP-80(12x12)",
    "pin_count": 80,
    "category": "Power Management (PMIC)",
    "subcategory": "Battery Management",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954800327708672",
    "parts": {
      "symbol": "max14921ecs-t.kicad_sym",
      "footprint": "max14921ecs-t.kicad_mod",
      "model_3d": "max14921ecs-t-hero.glb",
      "model_3d_plain": "max14921ecs-t-etched.glb",
      "model_3d_step": "max14921ecs-t-etched.step",
      "model_3d_step_plain": "max14921ecs-t.step",
      "lbr": "max14921ecs-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C2932577",
      "digikey": "175-MAX14921ECS+TTR-ND",
      "mouser": "700-MAX14921ECS+T"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T06:04:27Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "175-MAX14921ECS+TTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "700-MAX14921ECS+T",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SCLK",
        "type": "input",
        "description": "SPI clock input for the daisy-chainable SPI control interface."
      },
      {
        "number": "2",
        "name": "SDI",
        "type": "input",
        "description": "SPI data line input."
      },
      {
        "number": "3",
        "name": "SDO",
        "type": "output",
        "description": "SPI data line output."
      },
      {
        "number": "4",
        "name": "SAMPL",
        "type": "input",
        "description": "Sample control input; CV_ voltages are tracked while SAMPL is logic-high and are held internally when SAMPL transitions from high to low."
      },
      {
        "number": "5",
        "name": "VL",
        "type": "power_in",
        "description": "Logic supply input that should be bypassed to DGND with a 0.1µF capacitor placed as close as possible to the device."
      },
      {
        "number": "6",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "7",
        "name": "T3",
        "type": "input",
        "description": "Single-ended voltage input that can be connected to a temperature sensor or other analog voltage."
      },
      {
        "number": "8",
        "name": "T2",
        "type": "input",
        "description": "Single-ended voltage input that can be connected to a temperature sensor or other analog voltage."
      },
      {
        "number": "9",
        "name": "T1",
        "type": "input",
        "description": "Single-ended voltage input that can be connected to a temperature sensor or other analog voltage."
      },
      {
        "number": "10",
        "name": "AOUT",
        "type": "output",
        "description": "Buffered amplifier output whose voltage is relative to CV0."
      },
      {
        "number": "11",
        "name": "AGND",
        "type": "power_in",
        "description": "Low-noise analog ground; connect CV0 to AGND and connect DGND to AGND."
      },
      {
        "number": "12",
        "name": "VA",
        "type": "power_out",
        "description": "+5V LDO output that should be bypassed to AGND with a 1µF capacitor placed as close as possible to the device."
      },
      {
        "number": "13",
        "name": "LDOIN",
        "type": "power_in",
        "description": "+5V LDO power supply; connect to VP to enable the LDO or to VA to disable the LDO and use an external +5V supply."
      },
      {
        "number": "14",
        "name": "VP",
        "type": "power_in",
        "description": "Power supply connected to the highest voltage of the battery cell stack; bypass to AGND with a 0.1µF capacitor placed as close as possible to the device."
      },
      {
        "number": "15",
        "name": "CV16",
        "type": "input",
        "description": "Cell voltage input 16 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "16",
        "name": "BA16",
        "type": "output",
        "description": "Cell-balancing gate driver output 16 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "17",
        "name": "CT16",
        "type": "passive",
        "description": "Sampling capacitor 16 high terminal that internally connects to CV16 when SAMPL is logic-high; connect a 1µF capacitor between CT16 and CB16, or leave unconnected if not used."
      },
      {
        "number": "18",
        "name": "CB16",
        "type": "passive",
        "description": "Sampling capacitor 16 low terminal that internally connects to CV15 when SAMPL is logic-high; connect a 1µF capacitor between CT16 and CB16, or leave unconnected if not used."
      },
      {
        "number": "19",
        "name": "CV15",
        "type": "input",
        "description": "Cell voltage input 15 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "20",
        "name": "BA15",
        "type": "output",
        "description": "Cell-balancing gate driver output 15 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "21",
        "name": "CT15",
        "type": "passive",
        "description": "Sampling capacitor 15 high terminal that internally connects to CV15 when SAMPL is logic-high; connect a 1µF capacitor between CT15 and CB15, or leave unconnected if not used."
      },
      {
        "number": "22",
        "name": "CB15",
        "type": "passive",
        "description": "Sampling capacitor 15 low terminal that internally connects to CV14 when SAMPL is logic-high; connect a 1µF capacitor between CT15 and CB15, or leave unconnected if not used."
      },
      {
        "number": "23",
        "name": "CV14",
        "type": "input",
        "description": "Cell voltage input 14 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "24",
        "name": "BA14",
        "type": "output",
        "description": "Cell-balancing gate driver output 14 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "25",
        "name": "CT14",
        "type": "passive",
        "description": "Sampling capacitor 14 high terminal that internally connects to CV14 when SAMPL is logic-high; connect a 1µF capacitor between CT14 and CB14, or leave unconnected if not used."
      },
      {
        "number": "26",
        "name": "CB14",
        "type": "passive",
        "description": "Sampling capacitor 14 low terminal that internally connects to CV13 when SAMPL is logic-high; connect a 1µF capacitor between CT14 and CB14, or leave unconnected if not used."
      },
      {
        "number": "27",
        "name": "CV13",
        "type": "input",
        "description": "Cell voltage input 13 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "28",
        "name": "BA13",
        "type": "output",
        "description": "Cell-balancing gate driver output 13 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "29",
        "name": "CT13",
        "type": "passive",
        "description": "Sampling capacitor 13 high terminal that internally connects to CV13 when SAMPL is logic-high; connect a 1µF capacitor between CT13 and CB13, or leave unconnected if not used."
      },
      {
        "number": "30",
        "name": "CB13",
        "type": "passive",
        "description": "Sampling capacitor 13 low terminal that internally connects to CV12 when SAMPL is logic-high; connect a 1µF capacitor between CT13 and CB13, or leave unconnected if not used."
      },
      {
        "number": "31",
        "name": "CV12",
        "type": "input",
        "description": "Cell voltage input 12 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "32",
        "name": "BA12",
        "type": "output",
        "description": "Cell-balancing gate driver output 12 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "33",
        "name": "CT12",
        "type": "passive",
        "description": "Sampling capacitor 12 high terminal that internally connects to CV12 when SAMPL is logic-high; connect a 1µF capacitor between CT12 and CB12, or leave unconnected if not used."
      },
      {
        "number": "34",
        "name": "CB12",
        "type": "passive",
        "description": "Sampling capacitor 12 low terminal that internally connects to CV11 when SAMPL is logic-high; connect a 1µF capacitor between CT12 and CB12, or leave unconnected if not used."
      },
      {
        "number": "35",
        "name": "CV11",
        "type": "input",
        "description": "Cell voltage input 11 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "36",
        "name": "BA11",
        "type": "output",
        "description": "Cell-balancing gate driver output 11 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "37",
        "name": "CT11",
        "type": "passive",
        "description": "Sampling capacitor 11 high terminal that internally connects to CV11 when SAMPL is logic-high; connect a 1µF capacitor between CT11 and CB11, or leave unconnected if not used."
      },
      {
        "number": "38",
        "name": "CB11",
        "type": "passive",
        "description": "Sampling capacitor 11 low terminal that internally connects to CV10 when SAMPL is logic-high; connect a 1µF capacitor between CT11 and CB11, or leave unconnected if not used."
      },
      {
        "number": "39",
        "name": "CV10",
        "type": "input",
        "description": "Cell voltage input 10 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "40",
        "name": "BA10",
        "type": "output",
        "description": "Cell-balancing gate driver output 10 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "41",
        "name": "CT10",
        "type": "passive",
        "description": "Sampling capacitor 10 high terminal that internally connects to CV10 when SAMPL is logic-high; connect a 1µF capacitor between CT10 and CB10, or leave unconnected if not used."
      },
      {
        "number": "42",
        "name": "CB10",
        "type": "passive",
        "description": "Sampling capacitor 10 low terminal that internally connects to CV9 when SAMPL is logic-high; connect a 1µF capacitor between CT10 and CB10, or leave unconnected if not used."
      },
      {
        "number": "43",
        "name": "CV9",
        "type": "input",
        "description": "Cell voltage input 9 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "44",
        "name": "BA9",
        "type": "output",
        "description": "Cell-balancing gate driver output 9 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "45",
        "name": "CT9",
        "type": "passive",
        "description": "Sampling capacitor 9 high terminal that internally connects to CV9 when SAMPL is logic-high; connect a 1µF capacitor between CT9 and CB9, or leave unconnected if not used."
      },
      {
        "number": "46",
        "name": "CB9",
        "type": "passive",
        "description": "Sampling capacitor 9 low terminal that internally connects to CV8 when SAMPL is logic-high; connect a 1µF capacitor between CT9 and CB9, or leave unconnected if not used."
      },
      {
        "number": "47",
        "name": "CV8",
        "type": "input",
        "description": "Cell voltage input 8 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "48",
        "name": "BA8",
        "type": "output",
        "description": "Cell-balancing gate driver output 8 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "49",
        "name": "CT8",
        "type": "passive",
        "description": "Sampling capacitor 8 high terminal that internally connects to CV8 when SAMPL is logic-high; connect a 1µF capacitor between CT8 and CB8, or leave unconnected if not used."
      },
      {
        "number": "50",
        "name": "CB8",
        "type": "passive",
        "description": "Sampling capacitor 8 low terminal that internally connects to CV7 when SAMPL is logic-high; connect a 1µF capacitor between CT8 and CB8, or leave unconnected if not used."
      },
      {
        "number": "51",
        "name": "CV7",
        "type": "input",
        "description": "Cell voltage input 7 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "52",
        "name": "BA7",
        "type": "output",
        "description": "Cell-balancing gate driver output 7 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "53",
        "name": "CT7",
        "type": "passive",
        "description": "Sampling capacitor 7 high terminal that internally connects to CV7 when SAMPL is logic-high; connect a 1µF capacitor between CT7 and CB7, or leave unconnected if not used."
      },
      {
        "number": "54",
        "name": "CB7",
        "type": "passive",
        "description": "Sampling capacitor 7 low terminal that internally connects to CV6 when SAMPL is logic-high; connect a 1µF capacitor between CT7 and CB7, or leave unconnected if not used."
      },
      {
        "number": "55",
        "name": "CV6",
        "type": "input",
        "description": "Cell voltage input 6 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "56",
        "name": "BA6",
        "type": "output",
        "description": "Cell-balancing gate driver output 6 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "57",
        "name": "CT6",
        "type": "passive",
        "description": "Sampling capacitor 6 high terminal that internally connects to CV6 when SAMPL is logic-high; connect a 1µF capacitor between CT6 and CB6, or leave unconnected if not used."
      },
      {
        "number": "58",
        "name": "CB6",
        "type": "passive",
        "description": "Sampling capacitor 6 low terminal that internally connects to CV7 when SAMPL is logic-high; connect a 1µF capacitor between CT6 and CB6, or leave unconnected if not used."
      },
      {
        "number": "59",
        "name": "CV5",
        "type": "input",
        "description": "Cell voltage input 5 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "60",
        "name": "BA5",
        "type": "output",
        "description": "Cell-balancing gate driver output 5 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "61",
        "name": "CT5",
        "type": "passive",
        "description": "Sampling capacitor 5 high terminal that internally connects to CV5 when SAMPL is logic-high; connect a 1µF capacitor between CT5 and CB5, or leave unconnected if not used."
      },
      {
        "number": "62",
        "name": "CB5",
        "type": "passive",
        "description": "Sampling capacitor 5 low terminal that internally connects to CV4 when SAMPL is logic-high; connect a 1µF capacitor between CT5 and CB5, or leave unconnected if not used."
      },
      {
        "number": "63",
        "name": "CV4",
        "type": "input",
        "description": "Cell voltage input 4 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "64",
        "name": "BA4",
        "type": "output",
        "description": "Cell-balancing gate driver output 4 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "65",
        "name": "CT4",
        "type": "passive",
        "description": "Sampling capacitor 4 high terminal that internally connects to CV4 when SAMPL is logic-high; connect a 1µF capacitor between CT4 and CB4, or leave unconnected if not used."
      },
      {
        "number": "66",
        "name": "CB4",
        "type": "passive",
        "description": "Sampling capacitor 4 low terminal that internally connects to CV3 when SAMPL is logic-high; connect a 1µF capacitor between CT4 and CB4, or leave unconnected if not used."
      },
      {
        "number": "67",
        "name": "CV3",
        "type": "input",
        "description": "Cell voltage input 3 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "68",
        "name": "BA3",
        "type": "output",
        "description": "Cell-balancing gate driver output 3 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "69",
        "name": "CT3",
        "type": "passive",
        "description": "Sampling capacitor 3 high terminal that internally connects to CV3 when SAMPL is logic-high; connect a 1µF capacitor between CT3 and CB3, or leave unconnected if not used."
      },
      {
        "number": "70",
        "name": "CB3",
        "type": "passive",
        "description": "Sampling capacitor 3 low terminal that internally connects to CV2 when SAMPL is logic-high; connect a 1µF capacitor between CT3 and CB3, or leave unconnected if not used."
      },
      {
        "number": "71",
        "name": "CV2",
        "type": "input",
        "description": "Cell voltage input 2 connected to cell anode/cathode; connect to the highest voltage of the battery cell stack if not used."
      },
      {
        "number": "72",
        "name": "BA2",
        "type": "output",
        "description": "Cell-balancing gate driver output 2 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "73",
        "name": "CT2",
        "type": "passive",
        "description": "Sampling capacitor 2 high terminal that internally connects to CV2 when SAMPL is logic-high; connect a 1µF capacitor between CT2 and CB2, or leave unconnected if not used."
      },
      {
        "number": "74",
        "name": "CB2",
        "type": "passive",
        "description": "Sampling capacitor 2 low terminal that internally connects to CV1 when SAMPL is logic-high; connect a 1µF capacitor between CT2 and CB2, or leave unconnected if not used."
      },
      {
        "number": "75",
        "name": "CV1",
        "type": "input",
        "description": "Cell voltage input 1 connected to cell anode/cathode."
      },
      {
        "number": "76",
        "name": "BA1",
        "type": "output",
        "description": "Cell-balancing gate driver output 1 that connects to the gate of an external n-channel FET; leave unconnected if not used."
      },
      {
        "number": "77",
        "name": "CT1",
        "type": "passive",
        "description": "Sampling capacitor connection 1 high terminal that internally connects to CV1 when SAMPL is logic-high; connect a 1µF capacitor between CT1 and CV0, or leave unconnected if not used."
      },
      {
        "number": "78",
        "name": "CV0",
        "type": "input",
        "description": "Cell voltage input 0 that must be connected to AGND."
      },
      {
        "number": "79",
        "name": "EN",
        "type": "input",
        "description": "Enable input; drive low to put the device into shutdown mode and reset the SPI registers (the +5V LDO remains active), and drive high for normal operation."
      },
      {
        "number": "80",
        "name": "CS",
        "type": "input",
        "description": "SPI chip-select input, active low."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The requested MPN is MAX14921ECS+T. The datasheet ordering table lists MAX14921ECS+ (80 TQFP, packag; The datasheet pin table gives MAX14920 (64 TQFP-EP) and MAX14921 (80 TQFP) pin numbers side by side.; The datasheet's 80-pin top-view drawing (page 9) was not used for pin numbering because its text lay"
        ],
        "pages_sent": 11,
        "cost_usd": 0.1332,
        "at": "2026-10-19T06:02:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954800327708672",
        "pages": 30,
        "sha256": "f2fc78d7eb80734b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 80,
        "described": 80,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "max14921ecs-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          14.0,
          14.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "77f4de0ca0c787b8b4416c735fddfcecf5cf4cea0ca3550f96f5c47c8664594c",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "max14921ecs-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          14.0,
          14.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e3c131efdfdeece2cf6632d7fda943b8287cb9209b2183ac2530e110b71d5bf2",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}