component
M24C64-DRDW3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
M24C64-DRDW3TP
STMicroelectronics · EEPROM · TSSOP-8
M24C64-DRDW3TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Chip Enable input setting the least significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 2 | E1 | input | Chip Enable input setting the middle bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 3 | E2 | input | Chip Enable input setting the most significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 4 | VSS | power_in | Ground, the reference for the VCC supply voltage. |
| 5 | SDA | bidirectional | Serial Data input/output with open-drain output that needs a pull-up resistor to VCC and may be wire-OR'ed with other open-drain signals on the bus. |
| 6 | SCL | input | Serial Clock input used to strobe data on SDA in and to output data on SDA out. |
| 7 | WC | input | Write Control input (active high) that disables write operations to the entire memory array when driven high, with writes enabled when driven low or left floating. |
| 8 | VCC | power_in | Supply voltage pin, 1.7 V to 5.5 V operating range, decoupling with 10 nF to 100 nF capacitor recommended close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M24C64-DRDW3TP - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
m24c64-drdw3tp-etched.step/m24c64-drdw3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m24c64-drdw3tp.step/m24c64-drdw3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (41 pp, sha256
85c68012834e5400, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# M24C64-DRDW3TP
**STMicroelectronics** · EEPROM · TSSOP-8
M24C64-DRDW3TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Chip Enable input setting the least significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 2 | E1 | input | Chip Enable input setting the middle bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 3 | E2 | input | Chip Enable input setting the most significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |
| 4 | VSS | power_in | Ground, the reference for the VCC supply voltage. |
| 5 | SDA | bidirectional | Serial Data input/output with open-drain output that needs a pull-up resistor to VCC and may be wire-OR'ed with other open-drain signals on the bus. |
| 6 | SCL | input | Serial Clock input used to strobe data on SDA in and to output data on SDA out. |
| 7 | WC | input | Write Control input (active high) that disables write operations to the entire memory array when driven high, with writes enabled when driven low or left floating. |
| 8 | VCC | power_in | Supply voltage pin, 1.7 V to 5.5 V operating range, decoupling with 10 nF to 100 nF capacitor recommended close to the VCC/VSS pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `M24C64-DRDW3TP`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `m24c64-drdw3tp-etched.step` / `m24c64-drdw3tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m24c64-drdw3tp.step` / `m24c64-drdw3tp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939713684520960) (41 pp, sha256 `85c68012834e5400`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/m24c64-drdw3tp-datasheet.pdf)