component
M24C64-DRDW3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# M24C64-DRDW3TP++**STMicroelectronics** · EEPROM · TSSOP-8++M24C64-DRDW3TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | E0 | input | Chip Enable input setting the least significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |+| 2 | E1 | input | Chip Enable input setting the middle bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |+| 3 | E2 | input | Chip Enable input setting the most significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating. |+| 4 | VSS | power_in | Ground, the reference for the VCC supply voltage. |+| 5 | SDA | bidirectional | Serial Data input/output with open-drain output that needs a pull-up resistor to VCC and may be wire-OR'ed with other open-drain signals on the bus. |+| 6 | SCL | input | Serial Clock input used to strobe data on SDA in and to output data on SDA out. |+| 7 | WC | input | Write Control input (active high) that disables write operations to the entire memory array when driven high, with writes enabled when driven low or left floating. |+| 8 | VCC | power_in | Supply voltage pin, 1.7 V to 5.5 V operating range, decoupling with 10 nF to 100 nF capacitor recommended close to the VCC/VSS pins. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TSSOP-8 |+| Category | Memory |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `M24C64-DRDW3TP`+- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`+- 3D model: TSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `m24c64-drdw3tp-etched.step` / `m24c64-drdw3tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m24c64-drdw3tp.step` / `m24c64-drdw3tp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939713684520960) (41 pp, sha256 `85c68012834e5400`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m24c64-drdw3tp-datasheet.pdf)
page.jsonadded+197@@ -0,0 +1,197 @@+{+ "slug": "m24c64-drdw3tp",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "memory",+ "m24c64-drdw3tp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "m24c64-drdw3tp.kicad_sym",+ "m24c64-drdw3tp.kicad_mod",+ "m24c64-drdw3tp.glb",+ "m24c64-drdw3tp.step",+ "m24c64-drdw3tp.lbr",+ "docs/hero.png",+ "docs/m24c64-drdw3tp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "m24c64-drdw3tp-hero.glb",+ "m24c64-drdw3tp-hero.overlay.json"+ ],+ "component": {+ "mpn": "M24C64-DRDW3TP",+ "manufacturer": "STMicroelectronics",+ "package": "TSSOP-8",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "EEPROM",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939713684520960",+ "parts": {+ "symbol": "m24c64-drdw3tp.kicad_sym",+ "footprint": "m24c64-drdw3tp.kicad_mod",+ "model_3d": "m24c64-drdw3tp-hero.glb",+ "model_3d_plain": "m24c64-drdw3tp.glb",+ "model_3d_step": "m24c64-drdw3tp-etched.step",+ "model_3d_step_plain": "m24c64-drdw3tp.step",+ "lbr": "m24c64-drdw3tp.lbr"+ },+ "distributor_links": {+ "lcsc": "C2061594"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:53:58Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "E0",+ "type": "input",+ "description": "Chip Enable input setting the least significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating."+ },+ {+ "number": "2",+ "name": "E1",+ "type": "input",+ "description": "Chip Enable input setting the middle bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating."+ },+ {+ "number": "3",+ "name": "E2",+ "type": "input",+ "description": "Chip Enable input setting the most significant bit of the 3-bit chip enable address in the device select code; must be tied to VCC or VSS and reads as low when left floating."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground, the reference for the VCC supply voltage."+ },+ {+ "number": "5",+ "name": "SDA",+ "type": "bidirectional",+ "description": "Serial Data input/output with open-drain output that needs a pull-up resistor to VCC and may be wire-OR'ed with other open-drain signals on the bus."+ },+ {+ "number": "6",+ "name": "SCL",+ "type": "input",+ "description": "Serial Clock input used to strobe data on SDA in and to output data on SDA out."+ },+ {+ "number": "7",+ "name": "WC",+ "type": "input",+ "description": "Write Control input (active high) that disables write operations to the entire memory array when driven high, with writes enabled when driven low or left floating."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage pin, 1.7 V to 5.5 V operating range, decoupling with 10 nF to 100 nF capacitor recommended close to the VCC/VSS pins."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 41,+ "cost_usd": 0.4577,+ "at": "2026-10-08T00:53:43"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939713684520960",+ "pages": 41,+ "sha256": "85c68012834e5400",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "m24c64-drdw3tp.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "m24c64-drdw3tp-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "2010dbfc01948ad34c9bb934ab63fcf292eb173dd641c76361c49cfedf3c2c81",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}