# LWS6T7AM

**Lewa Micro** · MOSFETs · SOT-23

LWS6T7AM from Lewa Micro, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET, rated for a gate-to-source voltage of ±20 V maximum. |
| 2 | S | passive | Source of the P-channel MOSFET; continuous drain current is -2.5 A at TA=25 °C and drain-to-source voltage is -60 V. |
| 3 | D | passive | Drain of the P-channel MOSFET, rated -60 V drain-to-source, -2.5 A continuous and -10 A pulsed. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Lewa Micro |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS |  |  | -60 | V |  | 1 |
| Gate-to-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID |  |  | -2.5 | A | TA=25℃ | 1 |
| Continuous Drain Current | ID |  |  | -1.6 | A | TA=100℃ | 1 |
| Pulsed Drain Current | IDM |  |  | -10 | A | Repetitive rating; pulse width limited by maximum junction temperature | 1 |
| Power Dissipation | PD |  |  | 1.5 | W |  | 1 |
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | ℃ |  | 1 |
| Maximum Temperature for Soldering | TL |  |  | 260 | ℃ |  | 1 |
| Thermal Resistance, Junction-to-Ambient | θJA |  |  | 88 | ℃/W | Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection | 1 |
| Drain to Source Breakdown Voltage | V(BR)DSS | -60 |  |  | V | VGS=0V, ID=-250µA | 2 |
| Drain to Source Leakage Current | IDSS |  |  | -1 | µA | VDS=-60V, VGS=0V | 2 |
| Gate to Source Reverse Leakage | IGSS(R) |  |  | -100 | nA | VGS=-20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -1.1 | -1.6 | -2.1 | V | VDS=VGS, ID=-250µA | 2 |
| Drain-to-Source On-Resistance | RDS(ON) |  | 108 | 150 | mΩ | VGS=-10V, ID=-2.5A | 2 |
| Drain-to-Source On-Resistance | RDS(ON) |  | 100 | 110 | mΩ | VGS=-4.5V, ID=-2.0A | 2 |
| Diode Forward Current | IS |  |  | -2.5 | A | TA=25 °C | 2 |
| Diode Forward Voltage | VSD |  |  | -1.2 | V | IS=-2.5A, VGS=0V | 2 |

## CAD (KiCad official)

- Symbol: `LWS6T7AM`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lws6t7am-etched.step` / `lws6t7am-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lws6t7am.step` / `lws6t7am.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Lewa Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756663912471105536) (10 pp, sha256 `ea7fb5afb316d563`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lws6t7am-datasheet.pdf)