component
LTC7878AUH#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"description": "Analog Devices DC-DC Converters, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"power management (pmic)",
"ltc7878auh#trpbf",
"factory-2.0.0",
"extractor-text"
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"component": {
"mpn": "LTC7878AUH#TRPBF",
"manufacturer": "Analog Devices",
"package": "QFN-32(5x5)",
"pin_count": 33,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905489247055872",
"parts": {
"symbol": "ltc7878auh-trpbf.kicad_sym",
"footprint": "ltc7878auh-trpbf.kicad_mod",
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"model_3d_step_plain": "ltc7878auh-trpbf.step",
"lbr": "ltc7878auh-trpbf.lbr"
},
"distributor_links": {
"lcsc": "C5665467",
"digikey": "505-LTC7878AUH#TRPBFTR-ND",
"mouser": "584-LTC7878AUH#TRPBF"
},
"distributor_check": {
"checked_at": "2026-10-18T01:25:58Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-LTC7878AUH#TRPBFTR-ND",
"status": "found"
},
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"pn": "584-LTC7878AUH#TRPBF",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "BG1",
"type": "output",
"description": "Bottom gate driver output that drives the bottom N-channel MOSFET gate between PGND and DRVCC."
},
{
"number": "2",
"name": "VIN",
"type": "power_in",
"description": "Main IC supply input to the internal LDO, to be bypassed to PGND with 0.1µF to 1µF placed close to the pin."
},
{
"number": "3",
"name": "DRVCC",
"type": "power_out",
"description": "Gate driver LDO output regulated to 7V from VIN or EXTVCC, to be bypassed to PGND with a minimum of 4.7µF low-ESR tantalum or ceramic capacitor."
},
{
"number": "4",
"name": "EXTVCC",
"type": "power_in",
"description": "External power input to an internal LDO connected to DRVCC; when its voltage is greater than 8V and lower than the VIN voltage, it bypasses the VIN-powered LDO, and it is bypassed to PGND with 0.1µF to 1µF."
},
{
"number": "5",
"name": "INTVCC",
"type": "power_out",
"description": "Internal 5V regulator output that powers the control circuits, to be bypassed to SGND with a minimum of 4.7µF low-ESR capacitor."
},
{
"number": "6",
"name": "RUN",
"type": "input",
"description": "Enable control input where a voltage above 1.22V turns on the IC, with a 2µA pull-up that increases to 6µA once RUN rises above the threshold."
},
{
"number": "7",
"name": "PGND",
"type": "power_in",
"description": "Power ground that must be connected closely to the bottom MOSFET sources and the negative terminals of the VIN, DRVCC and EXTVCC bypass capacitors."
},
{
"number": "8",
"name": "BG2",
"type": "output",
"description": "Bottom gate driver output that drives the bottom N-channel MOSFET gate between PGND and DRVCC."
},
{
"number": "9",
"name": "TG2",
"type": "output",
"description": "Top gate driver output of a floating driver with a voltage swing equal to DRVCC superimposed on the SW2 switching node voltage."
},
{
"number": "10",
"name": "BOOST2",
"type": "power_out",
"description": "Bootstrapped supply for the top-side floating driver 2, swinging from DRVCC to (VOUT + DRVCC), with a bootstrap capacitor to SW2 and a Schottky diode to DRVCC."
},
{
"number": "11",
"name": "SW2",
"type": "passive",
"description": "Switch node connection normally tied to the inductor, swinging from a Schottky diode drop below ground up to VOUT, with a 0.1µF to 1µF bootstrap capacitor to BOOST2."
},
{
"number": "12",
"name": "PGOOD",
"type": "output",
"description": "Open-drain power good output pulled to ground when the regulated output exceeds the ±10% window after the internal 30µs power bad mask timer expires."
},
{
"number": "13",
"name": "SS",
"type": "passive",
"description": "Soft-start pin with a 2.5µA pull-up whose capacitor to ground sets the output voltage ramp rate."
},
{
"number": "14",
"name": "ITHB",
"type": "passive",
"description": "Fast transient current control threshold pin that may be configured with a resistor to ITH, and must not be left floating (short to ITH if unused)."
},
{
"number": "15",
"name": "ITH",
"type": "passive",
"description": "Current control threshold and error amplifier compensation point, with the compensation network connected from ITH to SGND."
},
{
"number": "16",
"name": "VFB",
"type": "input",
"description": "Output voltage sense input to the error amplifier noninverting input, receiving the remotely sensed feedback from an external resistor divider across the output."
},
{
"number": "17",
"name": "MODE/ILIM",
"type": "input",
"description": "Tying to GND or INTVCC enables forced continuous mode, otherwise pulse-skipping mode is used, and a voltage below INTVCC/2 selects the low current limit while above INTVCC/2 selects the high current limit."
},
{
"number": "18",
"name": "PHASMD",
"type": "input",
"description": "Phase mode program pin that sets the CLKOUT phase shift: tie to SGND for 180°, float for 120°, or tie to INTVCC for 90°."
},
{
"number": "19",
"name": "FREQ",
"type": "passive",
"description": "Frequency set pin where a resistor to SGND sets the switching frequency, with the pin sourcing 10µA."
},
{
"number": "20",
"name": "CLKOUT",
"type": "output",
"description": "Clock output used to synchronize the switching frequency of multiple LTC7878 ICs in parallel operation, swinging from INTVCC to ground."
},
{
"number": "21",
"name": "SYNC",
"type": "input",
"description": "Switching frequency synchronization input that locks to an external clock between 100kHz and 600kHz, and uses the FREQ resistor setting when low, with a 500k internal resistor to ground."
},
{
"number": "22",
"name": "SETCUR",
"type": "passive",
"description": "Average current regulation pin where a resistor to SGND sets the maximum average input or output current, with the pin sourcing 15µA."
},
{
"number": "23",
"name": "CSP",
"type": "input",
"description": "Positive input of the internal rail-to-rail average current sense amplifier."
},
{
"number": "24",
"name": "CSN",
"type": "input",
"description": "Negative input of the internal rail-to-rail average current sense amplifier."
},
{
"number": "25",
"name": "VOUT",
"type": "power_in",
"description": "Floating driver bias pin in boost mode that supplies bias current for the BOOST1 to SW1 driver circuitry when VOUT is much higher than VIN."
},
{
"number": "26",
"name": "NC",
"type": "unconnected",
"description": "No connect pin."
},
{
"number": "27",
"name": "ISNSN",
"type": "input",
"description": "Negative input of the current sense comparator, normally connected to the DCR sensing network."
},
{
"number": "28",
"name": "ISNSP",
"type": "input",
"description": "Positive input of the current sense comparator that must be Kelvin connected to the inductor on switching node SW1."
},
{
"number": "29",
"name": "ISNSD",
"type": "input",
"description": "DC current sense comparator input that amplifies the DC portion of the sensed current, and is shorted locally to ISNSP if unused in large DCR applications."
},
{
"number": "30",
"name": "SW1",
"type": "passive",
"description": "Switch node connection normally tied to the inductor, swinging from a Schottky diode drop below ground up to VIN, with a 0.1µF to 1µF bootstrap capacitor to BOOST1."
},
{
"number": "31",
"name": "BOOST1",
"type": "power_out",
"description": "Bootstrapped supply for the top-side floating driver 1, swinging from DRVCC to (VIN + DRVCC), with a bootstrap capacitor to SW1 and a Schottky diode to DRVCC."
},
{
"number": "32",
"name": "TG1",
"type": "output",
"description": "Top gate driver output of a floating driver with a voltage swing equal to DRVCC superimposed on the SW1 switching node voltage."
},
{
"number": "33",
"name": "SGND",
"type": "power_in",
"description": "Signal ground exposed pad that must be soldered to PCB ground for rated thermal performance, and to which all small-signal components (INTVCC, SS, ITH, VFB, FREQ, etc.) connect."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The TOP VIEW pin map on page 2 is garbled in the extracted text, so pin numbers were taken from the ; Pin 26 (NC) is a no-connect pin and is typed as unconnected.; Pin 33 is the exposed pad, listed as SGND. The datasheet says it must be soldered to PCB ground; it "
],
"pages_sent": 9,
"cost_usd": 0.0936,
"at": "2026-10-18T01:24:30"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905489247055872",
"pages": 29,
"sha256": "570c451c2e04a375",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ltc7878auh-trpbf-etched.step",
"role": "eda",
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"units": "mm",
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"sha256": "99945c313d82b7263cc0f13a184421dd3e486ea026ad532f3c280b6ca049bea4",
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}
}