LTC4162EUFD-FSTM#PBF

{
  "slug": "ltc4162eufd-fstm-pbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Battery Management, QFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ltc4162eufd-fstm#pbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "docs/ltc4162eufd-fstm-pbf-datasheet.pdf",
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  "component": {
    "mpn": "LTC4162EUFD-FSTM#PBF",
    "manufacturer": "Analog Devices",
    "package": "QFN-28(4x5)",
    "pin_count": 29,
    "category": "Power Management (PMIC)",
    "subcategory": "Battery Management",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590469465470373888",
    "parts": {
      "symbol": "ltc4162eufd-fstm-pbf.kicad_sym",
      "footprint": "ltc4162eufd-fstm-pbf.kicad_mod",
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      "model_3d_plain": "ltc4162eufd-fstm-pbf-etched.glb",
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      "lbr": "ltc4162eufd-fstm-pbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C3682819",
      "digikey": "505-LTC4162EUFD-FSTM#PBF-ND",
      "mouser": "584-4162EUFDFSTMPB"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T20:45:28Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LTC4162EUFD-FSTM#PBF-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "584-4162EUFDFSTMPB",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BOOST",
        "type": "power_out",
        "description": "Gate-drive bias for the high-side switch, pumped relative to SW and charged from INTVCC through an internal diode; requires a 22nF multilayer ceramic capacitor from SW to BOOST."
      },
      {
        "number": "2",
        "name": "INTVCC",
        "type": "power_out",
        "description": "Bypass pin for the internal 5V regulator that powers the analog circuitry; requires a 4.7µF multilayer ceramic capacitor to GND."
      },
      {
        "number": "3",
        "name": "VOUTA",
        "type": "power_out",
        "description": "Analog system power pin that powers the majority of internal circuits; requires a 0.1µF multilayer ceramic capacitor to GND."
      },
      {
        "number": "4",
        "name": "CLN",
        "type": "input",
        "description": "Negative terminal connection of the sense resistor that measures and regulates input current by limiting charge current."
      },
      {
        "number": "5",
        "name": "CLP",
        "type": "input",
        "description": "Positive terminal connection of the sense resistor that measures and regulates input current by limiting charge current."
      },
      {
        "number": "6",
        "name": "INFET",
        "type": "output",
        "description": "Gate control output for an input reverse-blocking external N-channel MOSFET between VIN and VOUT."
      },
      {
        "number": "7",
        "name": "VIN",
        "type": "power_in",
        "description": "Supply voltage detection and INFET charge-pump supply for the PowerPath; requires a 0.1µF multilayer ceramic capacitor to GND."
      },
      {
        "number": "8",
        "name": "VCC2P5",
        "type": "power_out",
        "description": "Bypass pin for the internal 2.5V regulator that powers the internal logic; requires a 1µF multilayer ceramic capacitor to GND."
      },
      {
        "number": "9",
        "name": "NTCBIAS",
        "type": "power_out",
        "description": "NTC thermistor bias output that applies 1.2V during NTC measurement; connect a low-temperature-coefficient bias resistor equal to the thermistor nominal value between NTCBIAS and NTC."
      },
      {
        "number": "10",
        "name": "NTC",
        "type": "input",
        "description": "Thermistor input digitized to qualify battery charging and readable over I2C; requires a low-drift bias resistor from NTCBIAS and a thermistor to ground."
      },
      {
        "number": "11",
        "name": "RT",
        "type": "passive",
        "description": "Switching regulator frequency control pin; a resistor from RT to GND sets the internal oscillator frequency (fOSC 1.4 to 1.6MHz at RT = 63.4k)."
      },
      {
        "number": "12",
        "name": "SMBALERT",
        "type": "output",
        "description": "Open-drain interrupt output that pulls low when one or more programmable alerts is triggered."
      },
      {
        "number": "13",
        "name": "SCL",
        "type": "input",
        "description": "Open-drain clock input for the I2C port, with input levels scaled with respect to DVCC."
      },
      {
        "number": "14",
        "name": "SDA",
        "type": "bidirectional",
        "description": "Open-drain data input/output for the I2C port, with input levels scaled with respect to DVCC."
      },
      {
        "number": "15",
        "name": "DVCC",
        "type": "power_in",
        "description": "Logic supply for the I2C port that sets the SDA and SCL reference levels; the logic reference range is 1.8V to 5.5V."
      },
      {
        "number": "16",
        "name": "SYNC",
        "type": "input",
        "description": "Optional external clock input that the switching charger locks to, near the RT-programmed frequency; ground if the feature is not used."
      },
      {
        "number": "17",
        "name": "CELLS0",
        "type": "input",
        "description": "Cell-count selection strap used with CELLS1; must be tied to INTVCC, VCC2P5 or GND (see Table 5)."
      },
      {
        "number": "18",
        "name": "CELLS1",
        "type": "input",
        "description": "Cell-count selection strap used with CELLS0; must be tied to INTVCC, VCC2P5 or GND (see Table 5)."
      },
      {
        "number": "19",
        "name": "BATSENS+",
        "type": "input",
        "description": "Positive battery terminal sense pin that should be Kelvin-sensed; requires a 10µF multilayer ceramic capacitor to ground."
      },
      {
        "number": "20",
        "name": "CSN",
        "type": "input",
        "description": "Negative terminal connection of the current sense resistor used to measure and limit charge current."
      },
      {
        "number": "21",
        "name": "CSP",
        "type": "input",
        "description": "Positive terminal connection of the current sense resistor used to measure and limit charge current."
      },
      {
        "number": "22",
        "name": "BATFET",
        "type": "output",
        "description": "Gate control pin for a reverse-blocking external N-channel MOSFET between the battery and VOUT."
      },
      {
        "number": "23",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground pin that should connect to a copper pour forming the return for the VOUT bypass capacitor."
      },
      {
        "number": "24",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground pin that should connect to a copper pour forming the return for the VOUT bypass capacitor."
      },
      {
        "number": "25",
        "name": "SW",
        "type": "output",
        "description": "Switching regulator power transmission pin that delivers power from VOUT to the battery; the inductor connects from SW to the sense resistor at CSP."
      },
      {
        "number": "26",
        "name": "SW",
        "type": "output",
        "description": "Switching regulator power transmission pin that delivers power from VOUT to the battery; the inductor connects from SW to the sense resistor at CSP."
      },
      {
        "number": "27",
        "name": "VOUT",
        "type": "power_in",
        "description": "Switching regulator input pin that delivers power to the switching charger; bypassing these pins takes precedence over other layout considerations, with 10µF a good starting point."
      },
      {
        "number": "28",
        "name": "VOUT",
        "type": "power_in",
        "description": "Switching regulator input pin that delivers power to the switching charger; bypassing these pins takes precedence over other layout considerations, with 10µF a good starting point."
      },
      {
        "number": "29",
        "name": "AGND",
        "type": "power_in",
        "description": "Exposed pad analog ground that returns all analog circuitry; must be soldered to the PCB and connected to an analog ground pour common with PGND (pins 23 and 24)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin configuration diagram on page 3 is scrambled in the text extraction, so the pin-number-to-na; The datasheet does not give an explicit KiCad ERC type for these pins; types were inferred from thei; SW is described as a switching regulator power transmission pin with no explicit direction; typed as"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0715,
        "at": "2026-10-20T20:40:09"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590469465470373888",
        "pages": 52,
        "sha256": "6aecc6c02aff81b7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 29,
        "described": 29,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "sha256": "028686d522379f70cdcac54d7cbc05f7e8d72fe41515288068d2e2da8d27bc8d",
        "checked": "2026-10-20",
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        "sha256": "1de98bbf1c13b4243fc2e3c27ceac7ec47b5fbd2dc16e7ad66576b033c16307d",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}