LT3845EFE#TRPBF

{
  "slug": "lt3845efe-trpbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices DC-DC Converters, TSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management ics",
    "lt3845efe#trpbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lt3845efe-trpbf.kicad_sym",
    "lt3845efe-trpbf.kicad_mod",
    "lt3845efe-trpbf.glb",
    "lt3845efe-trpbf.step",
    "lt3845efe-trpbf.lbr",
    "docs/hero.png",
    "docs/lt3845efe-trpbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt3845efe-trpbf-hero.glb",
    "lt3845efe-trpbf-hero.overlay.json",
    "lt3845efe-trpbf-etched.glb"
  ],
  "component": {
    "mpn": "LT3845EFE#TRPBF",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16-EP",
    "pin_count": 17,
    "category": "Power Management ICs",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/3845fd.pdf",
    "parts": {
      "symbol": "lt3845efe-trpbf.kicad_sym",
      "footprint": "lt3845efe-trpbf.kicad_mod",
      "model_3d": "lt3845efe-trpbf-hero.glb",
      "model_3d_plain": "lt3845efe-trpbf-etched.glb",
      "model_3d_step": "lt3845efe-trpbf-etched.step",
      "model_3d_step_plain": "lt3845efe-trpbf.step",
      "lbr": "lt3845efe-trpbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C671638",
      "digikey": "LT3845EFE#TRPBFTR-ND",
      "mouser": "584-LT3845EFE#TRPBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T04:09:11Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "LT3845EFE#TRPBFTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-LT3845EFE#TRPBF",
        "status": "found",
        "lifecycle": "Restricted Availability"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VIN",
        "type": "power_in",
        "description": "Main supply pin, to be decoupled to SGND with a low ESR capacitor of at least 0.1μF located close to the pin; the part operates from a 4V to 60V input range."
      },
      {
        "number": "2",
        "name": "SHDN",
        "type": "input",
        "description": "Enable pin with a precision 1.35V rising threshold and 120mV hysteresis; pulling it below about 0.7V enters low-current shutdown, and the pin is internally clamped to 6V with an absolute maximum of 5V."
      },
      {
        "number": "3",
        "name": "CSS",
        "type": "passive",
        "description": "Soft-start capacitor pin, where CSS = 2μA(tSS/1.231V) sets the output voltage slew rate, and it should be left unconnected when soft-start is not used."
      },
      {
        "number": "4",
        "name": "BURST_EN",
        "type": "input",
        "description": "Below 0.5V enables Burst Mode operation and reverse-current inhibit, above 0.5V disables Burst Mode while keeping reverse-current inhibit, and connecting it to VCC disables both; absolute maximum is 24V."
      },
      {
        "number": "5",
        "name": "VFB",
        "type": "input",
        "description": "Output voltage feedback input to the inverting input of the error amplifier, which regulates VFB at 1.231V through an external resistive divider; absolute maximum is 5V."
      },
      {
        "number": "6",
        "name": "VC",
        "type": "passive",
        "description": "Error amplifier output that sets the peak switch current per cycle and is typically compensated with an RC network to SGND; it must not be pulled low by a low impedance source and should be driven through a 1kΩ series resistance if externally manipulated."
      },
      {
        "number": "7",
        "name": "SYNC",
        "type": "input",
        "description": "External clock input for synchronizing the oscillator, with RSET set so the internal oscillator runs 10% to 25% below the external clock within a 100kHz to 600kHz sync range; connect to SGND if unused, and the absolute maximum is 5V."
      },
      {
        "number": "8",
        "name": "fSET",
        "type": "passive",
        "description": "Programs the oscillator frequency with an external resistor RSET, which is required even when an external sync clock is applied."
      },
      {
        "number": "9",
        "name": "SENSE–",
        "type": "input",
        "description": "Negative input of the current sense amplifier, connected to the VOUT side of the sense resistor in step-down applications; the sensed inductor current limit is ±100mV across the SENSE inputs and the absolute maximum voltage is 40V."
      },
      {
        "number": "10",
        "name": "SENSE+",
        "type": "input",
        "description": "Positive input of the current sense amplifier, connected to the inductor side of the sense resistor in step-down applications; the sensed inductor current limit is ±100mV across the SENSE inputs and the absolute maximum voltage is 40V."
      },
      {
        "number": "11",
        "name": "PGND",
        "type": "power_in",
        "description": "High-current ground reference for the internal low-side switch driver and the VCC regulator, to be connected directly to the negative terminal of the VCC decoupling capacitor."
      },
      {
        "number": "12",
        "name": "BG",
        "type": "output",
        "description": "Gate drive for the bottom N-channel MOSFET, to be connected with a short, wide (about 0.02 in) PCB trace to minimize inductance."
      },
      {
        "number": "13",
        "name": "VCC",
        "type": "power_out",
        "description": "Internal bias supply decoupling node that requires a low ESR ceramic capacitor of 1μF or greater to PGND; the absolute maximum rating is 24V."
      },
      {
        "number": "14",
        "name": "SW",
        "type": "passive",
        "description": "Reference for the VBOOST supply and the high current return for the bootstrapped switch; the absolute maximum switch voltage is 65V to -2V."
      },
      {
        "number": "15",
        "name": "TG",
        "type": "output",
        "description": "Bootstrapped gate drive for the top N-channel MOSFET, to be connected with a short, wide (about 0.02 in) PCB trace to minimize inductance."
      },
      {
        "number": "16",
        "name": "BOOST",
        "type": "power_in",
        "description": "Supply for the bootstrapped gate drive, connected to a low ESR ceramic boost capacitor referenced to SW (0.1μF is typical, at least 50 times the top MOSFET gate capacitance); the maximum voltage on this pin is VIN + VCC, ground referred."
      },
      {
        "number": "17",
        "name": "SGND",
        "type": "power_in",
        "description": "Exposed pad and low-noise ground reference, internally connected to the SGND pin, which must be soldered to the PCB ground for electrical and thermal performance and connected to the -VOUT side of the output capacitors."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The TSSOP TOP VIEW in the text shows pin numbers only in the drawing, and the right-column pin names; Pin 17 is the exposed pad, which the datasheet identifies as SGND. It is not a separately numbered l; Left-column pin assignments (1 VIN through 8 fSET) are taken from the TOP VIEW and are consistent wi",
          "3/17 pins cited to the wrong page (name found elsewhere): ['13:VCC@p8', '15:TG@p8', '17:SGND@p8']"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0752,
        "at": "2026-10-31T04:08:31"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/3845fd.pdf",
        "pages": 26,
        "sha256": "1d802d74ecb7d372",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 17,
        "described": 17,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lt3845efe-trpbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt3845efe-trpbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b0243d9869959f8ea0bc6aa4a5a156be269eccbc74c67d43964a07c62e3554be",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "FE16 (BC) TSSOP",
      "source_page": 24,
      "D": {
        "nom_mm": 5.0,
        "range_mm": [
          4.9,
          5.1
        ]
      },
      "E1": {
        "nom_mm": 4.4,
        "range_mm": [
          4.3,
          4.5
        ]
      },
      "E": {
        "nom_mm": 6.4,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.1,
        "range_mm": [
          null,
          1.1
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "lt3845efe-trpbf.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}