component
LT3757AIMSE#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, MSOP-10-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 10d ago |
| viewers | 10d ago |
| lt3757aimse-trpbf-etched.glb | 10d ago |
| lt3757aimse-trpbf-etched.step | 10d ago |
| lt3757aimse-trpbf-hero.glb | 10d ago |
| lt3757aimse-trpbf-hero.overlay.json | 10d ago |
| lt3757aimse-trpbf.glb | 10d ago |
| lt3757aimse-trpbf.kicad_mod | 10d ago |
| lt3757aimse-trpbf.kicad_sym | 10d ago |
| lt3757aimse-trpbf.lbr | 10d ago |
| lt3757aimse-trpbf.step | 10d ago |
| package.json | 10d ago |
| page.json | 10d ago |
| README.md | 10d ago |
LT3757AIMSE#TRPBF
Analog Devices · DC-DC Converters · MSOP-10-EP
LT3757AIMSE#TRPBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VC | passive | Error amplifier compensation pin used to stabilize the voltage loop with an external RC network. |
| 2 | FBX | input | Positive and negative feedback pin that receives the divider voltage from the output, regulating to 1.6V (positive) or -0.8V (negative), with an absolute maximum range of -6V to 6V. |
| 3 | SS | passive | Soft-start pin with a 10µA (typical) pull-up to an internal 2.5V rail, where the soft-start interval is set by an external capacitor and the pin is reset to GND by UVLO, INTVCC UV/OV or thermal lockout. |
| 4 | RT | passive | Switching frequency adjustment pin set by a resistor to GND, which must not be left open; RT voltage is 1.2V typical and the frequency range is 50kHz to 1MHz. |
| 5 | SYNC | input | Frequency synchronization input for an external clock, with the RT resistor chosen for a switching frequency 20% slower than the SYNC pulse frequency, and tied to GND when unused (SYNC input high 1.5V, low 0.4V, absolute maximum 8V). |
| 6 | SENSE | input | Current sense input for the control loop, Kelvin-connected to the positive terminal of the N-channel MOSFET source sense resistor, with a current limit threshold of 100mV to 120mV and an absolute maximum of ±0.3V. |
| 7 | GATE | output | N-channel MOSFET gate driver output that switches between INTVCC and GND and is driven to GND during shutdown, thermal lockout, or INTVCC overvoltage/undervoltage. |
| 8 | INTVCC | power_out | Regulated supply for internal loads and the gate driver, regulated to 7.2V typical and bypassed with a minimum of 4.7µF placed close to the pin, with an external supply limit of 17.5V. |
| 9 | SHDN/UVLO | input | Shutdown and undervoltage detect input with a 1.22V (nominal) falling threshold and externally programmable hysteresis, which must be tied to 0.4V or less to disable the device. |
| 10 | VIN | power_in | Input supply pin with an operating range of 2.9V to 40V, to be locally bypassed with a 0.22µF or larger capacitor placed close to the pin. |
| 11 | GND | power_in | Ground exposed pad that also serves as the negative terminal of the current sense resistor and must be soldered directly to the local ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10-EP |
| Category | Power Management ICs |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature range (LT3757AI grade) | -40 | 125 | °C | LT3757AIMSE operating temperature range | 2 | ||
| VIN Operating Range | VIN | 2.9 | 40 | V | 3 | ||
| VIN Shutdown IQ | IQ | 0.1 | 1 | µA | SHDN/UVLO = 0V | 3 | |
| VIN Shutdown IQ | IQ | 6 | µA | SHDN/UVLO = 1.15V | 3 | ||
| VIN Operating IQ | IQ | 1.6 | 2.2 | mA | VC = 0.3V, RT = 41.2k | 3 | |
| VIN Operating IQ with Internal LDO Disabled | IQ | 280 | 400 | µA | VC = 0.3V, RT = 41.2k, INTVCC = 7.5V | 3 | |
| SENSE Current Limit Threshold | VSENSE(MAX) | 100 | 110 | 120 | mV | Over full operating temperature range (l) | 3 |
| FBX Regulation Voltage (positive) | VFBX(REG) | 1.569 | 1.6 | 1.631 | V | VFBX > 0V (Note 3) | 3 |
| FBX Regulation Voltage (negative) | VFBX(REG) | -0.816 | -0.8 | -0.784 | V | VFBX < 0V (Note 3) | 3 |
| FBX Overvoltage Lockout (positive) | VFBX(OVERVOLTAGE) | 6 | 7 | 8 | % | VFBX > 0V (Note 4) | 3 |
| FBX Overvoltage Lockout (negative) | VFBX(OVERVOLTAGE) | 10 | 11 | 14 | % | VFBX < 0V (Note 4) | 3 |
| FBX Pin Input Current | IFBX | -10 | 10 | nA | VFBX = 1.6V (Note 3) | 3 | |
| FBX Pin Input Current | IFBX | 70 | 100 | nA | VFBX = -0.8V (Note 3) | 3 | |
| VFBX Line Regulation (positive) | ∆VFBX/(∆VIN·VFBX(REG)) | 0.002 | 0.0025 | %/V | VFBX > 0V, 2.9V < VIN < 40V (Notes 3, 7) | 3 | |
| VFBX Line Regulation (negative) | ∆VFBX/(∆VIN·VFBX(REG)) | 0.05 | 0.056 | %/V | VFBX < 0V, 2.9V < VIN < 40V (Notes 3, 7) | 3 | |
| Switching Frequency | fSW | 270 | 300 | 330 | kHz | RT = 41.2k to GND, VFBX = 1.6V | 3 |
| Switching Frequency | fSW | 50 | kHz | RT = 442k to GND, VFBX = 1.6V | 3 | ||
| Switching Frequency | fSW | 1000 | kHz | RT = 10.5k to GND, VFBX = 1.6V | 3 | ||
| SYNC Input Low | VSYNC(L) | 0.4 | V | 4 | |||
| SYNC Input High | VSYNC(H) | 1.5 | V | 4 | |||
| INTVCC Regulation Voltage | VINTVCC | 7 | 7.2 | 7.4 | V | Over full operating temperature range (l) | 4 |
| INTVCC Undervoltage Lockout Threshold (falling) | VINTVCC(UVLO) | 2.6 | 2.7 | 2.8 | V | Falling INTVCC | 4 |
| INTVCC Overvoltage Lockout Threshold | VINTVCC(OVLO) | 16 | 17.5 | V | 4 | ||
| INTVCC Current Limit | IINTVCC(LIM) | 30 | 40 | mA | VIN = 40V | 4 | |
| INTVCC Current Limit | IINTVCC(LIM) | 55 | 95 | mA | VIN = 15V | 4 | |
| INTVCC Load Regulation | ∆VINTVCC/VINTVCC | -0.9 | -0.5 | % | 0 < IINTVCC < 20mA, VIN = 8V | 4 | |
| INTVCC Line Regulation | ∆VINTVCC/(VINTVCC·∆VIN) | 0.008 | 0.03 | %/V | 8V < VIN < 40V | 4 | |
| Dropout Voltage (VIN, VINTVCC) | VIN-VINTVCC | 400 | mV | VIN = 6V, IINTVCC = 20mA | 4 | ||
| SHDN/UVLO Threshold Voltage (falling) | VSHDN/UVLO | 1.17 | 1.22 | 1.27 | V | VIN = INTVCC = 8V, falling (l) | 4 |
| SHDN/UVLO Input Low Voltage | VSHDN/UVLO(L) | 0.4 | V | I(VIN) drops below 1µA | 4 | ||
| SHDN/UVLO Pin Bias Current Low | ISHDN/UVLO | 1.7 | 2 | 2.5 | µA | SHDN/UVLO = 1.15V | 4 |
| SHDN/UVLO Pin Bias Current High | ISHDN/UVLO | 10 | 100 | nA | SHDN/UVLO = 1.30V | 4 | |
| Gate Driver Output VOL | VOL | 0.05 | V | 4 | |||
| VIN, SHDN/UVLO absolute maximum | VIN, VSHDN/UVLO | 40 | V | SHDN/UVLO per Note 6 | 2 | ||
| INTVCC absolute maximum | VINTVCC | 20 | V | Also limited to VIN + 0.3V | 2 | ||
| SYNC absolute maximum | VSYNC | 8 | V | 2 | |||
| VC, SS absolute maximum | VC, VSS | 3 | V | 2 | |||
| RT absolute maximum | VRT | 1.5 | V | 2 | |||
| SENSE absolute maximum | VSENSE | -0.3 | 0.3 | V | 2 | ||
| FBX absolute maximum | VFBX | -6 | 6 | V | 2 | ||
| Storage Temperature Range (MSOP) | TSTG | -65 | 150 | °C | MSOP package | 2 | |
| Lead Temperature (Soldering, 10 sec) MSOP | TLEAD | 300 | °C | 10 sec soldering | 2 | ||
| Maximum Junction Temperature (MSE package) | TJMAX | 150 | °C | MSE (MSOP) package | 2 | ||
| Transconductance | gm | 230 | µS | ΔIVC/ΔVFBX (Note 3) | 3 | ||
| VC Output Impedance | ZVC | 5 | MΩ | (Note 3) | 3 | ||
| VC Current Mode Gain | ∆VVC/∆VSENSE | 5.5 | V/V | 3 | |||
| VC Source Current | IVC | -15 | µA | VFBX = 0V, VC = 1.5V | 3 | ||
| VC Sink Current | IVC | 12 | µA | VFBX = 1.7V | 3 | ||
| VC Sink Current | IVC | 11 | µA | VFBX = -0.85V | 3 | ||
| RT Voltage | VRT | 1.2 | V | VFBX = 1.6V | 3 | ||
| Minimum Off-Time | tOFF(MIN) | 220 | ns | 3 | |||
| Minimum On-Time | tON(MIN) | 220 | ns | 3 | |||
| SS Pull-Up Current | ISS | -10 | µA | SS = 0V, current out of pin | 4 | ||
| INTVCC UVLO Hysteresis | 0.1 | V | 4 | ||||
| INTVCC Current in Shutdown | IINTVCC(SD) | 16 | µA | SHDN/UVLO = 0V, INTVCC = 8V | 4 | ||
| INTVCC Voltage to Bypass Internal LDO | 7.5 | V | 4 | ||||
| Gate Driver Output Rise Time | tr | 22 | ns | CL = 3300pF, INTVCC = 7.5V | 4 | ||
| Gate Driver Output Fall Time | tf | 20 | ns | CL = 3300pF, INTVCC = 7.5V | 4 | ||
| Thermal resistance junction-to-ambient (MSE package) | θJA | 40 | °C/W | MSE package, exposed pad soldered to full copper plane | 2 |
CAD (KiCad official)
- Symbol:
LT3757AIMSE#TRPBF - Footprint:
Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm - 3D model: MSOP-10-EP (KiCad packages3D, STEP)
- 3D model files:
lt3757aimse-trpbf-etched.step/lt3757aimse-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3757aimse-trpbf.step/lt3757aimse-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (38 pp, sha256
a50e40555a5ca7a0, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).