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LT3060ITS8#TRMPBF
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Analog Devices Linear Voltage Regulators (LDO), TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LT3060ITS8#TRMPBF
Analog Devices · Linear Voltage Regulators (LDO) · TSOT-23-8
LT3060ITS8#TRMPBF from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHDN | input | Pulling SHDN low puts the LT3060 into a low power state and turns the output off, and the SHDN pin cannot be driven below GND unless tied to IN. |
| 2 | GND | power_in | Ground; for the adjustable LT3060 the bottom of the output-setting resistor divider connects directly to GND for optimum regulation. |
| 3 | GND | power_in | Ground; tied together with pins 2 and 4 as the TS8 package ground connection. |
| 4 | GND | power_in | Ground; tied together with pins 2 and 3 as the TS8 package ground connection. |
| 5 | IN | power_in | Supplies power to the device; an input bypass capacitor of 1µF to 10µF suffices and the LT3060 withstands reverse voltages on IN with respect to its GND and OUT pins. |
| 6 | OUT | power_out | Supplies power to the load; stability requires a minimum 2.2µF ceramic output capacitor and the permissible output voltage range is 600mV to 44.5V. |
| 7 | ADJ | input | Error amplifier inverting terminal held at 600mV referenced to GND with a typical bias current of 15nA flowing out of the pin; left floating for fixed-voltage versions if low noise and fast transient response are not required. |
| 8 | REF/BYP | passive | A single capacitor from this pin to GND bypasses reference noise and soft-starts the reference, and the pin must not be driven with any active circuitry. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ADJ Pin Voltage | VADJ | 588 | 600 | 612 | mV | VIN = 2.1V, ILOAD = 1mA; 2.1V < VIN < 45V, 1mA < ILOAD < 100mA (I-Grade) | 4 |
| ADJ Pin Voltage | VADJ | 594 | 600 | 606 | mV | VIN = 2.1V, ILOAD = 1mA | 4 |
| Line Regulation | 0.6 | 3.5 | mV | ΔVIN = 2.1V to 45V, ILOAD = 1mA (E-, I-Grades) | 4 | ||
| Load Regulation | 0.2 | 4 | mV | VIN = 2.1V, ILOAD = 1mA to 100mA (E-, I-Grades) | 5 | ||
| Dropout Voltage | VDROPOUT | 75 | 110 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA | 5 | |
| Dropout Voltage | VDROPOUT | 180 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA, full operating temperature range | 5 | ||
| Dropout Voltage | VDROPOUT | 150 | 200 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA | 5 | |
| Dropout Voltage | VDROPOUT | 300 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA, full operating temperature range | 5 | ||
| Dropout Voltage | VDROPOUT | 240 | 280 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14) | 5 | |
| Dropout Voltage | VDROPOUT | 410 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14), full operating temperature range | 5 | ||
| Dropout Voltage | VDROPOUT | 300 | 350 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14) | 5 | |
| Dropout Voltage | VDROPOUT | 510 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14), full operating temperature range | 5 | ||
| GND Pin Current | IGND | 40 | 80 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 0µA | 5 | |
| GND Pin Current | IGND | 60 | 100 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1mA | 5 | |
| GND Pin Current | IGND | 160 | 350 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 10mA | 5 | |
| GND Pin Current | IGND | 0.8 | 1.8 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 50mA | 5 | |
| GND Pin Current | IGND | 2 | 4 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 100mA | 5 | |
| Quiescent Current in Shutdown | ISHDN | 0.3 | 1 | µA | VIN = 45V, VSHDN = 0V | 5 | |
| ADJ Pin Bias Current | IADJ | 15 | 60 | nA | VIN = 2.1V, full operating temperature range | 5 | |
| Output Voltage Noise | VN | 30 | µVRMS | COUT = 10µF, ILOAD = 100mA, CBYP = 0.01µF, VOUT = 600mV, BW = 10Hz to 100kHz | 5 | ||
| Shutdown Threshold (Off to On) | VSHDN | 0.3 | 0.8 | V | VOUT = Off to On, full operating temperature range | 5 | |
| Shutdown Threshold (On to Off) | VSHDN | 0.7 | 1.5 | V | VOUT = On to Off, full operating temperature range | 5 | |
| SHDN Pin Current | ISHDN | 1 | 3 | µA | VSHDN = 45V, full operating temperature range | 5 | |
| Ripple Rejection | RR | 70 | 85 | dB | VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA, VIN = 2.1V (Avg) | 5 | |
| Current Limit | ILIM | 110 | 200 | mA | VIN = VOUT(NOMINAL) + 1V, ΔVOUT = -5%, full operating temperature range | 5 | |
| Input Reverse Leakage Current | IREV | 300 | µA | VIN = -45V, VOUT = 0, full operating temperature range | 6 | ||
| Reverse Output Current | IRO | 0.2 | 10 | µA | VOUT = 1.2V, VIN = 0V | 6 | |
| Minimum Input Voltage | VIN(MIN) | 1.6 | 2.1 | V | ILOAD = 100mA, full operating temperature range | 4 | |
| Input Voltage Range | VIN | 1.6 | 45 | V | Operating input supply range | 1 | |
| IN Pin Voltage | VIN | -50 | 50 | V | Absolute maximum | 2 | |
| OUT Pin Voltage | VOUT | -50 | 50 | V | Absolute maximum | 2 | |
| Input-to-Output Differential Voltage | VIN-VOUT | -50 | 50 | V | Absolute maximum (Note 2) | 2 | |
| ADJ Pin Voltage | VADJ | -50 | 50 | V | Absolute maximum | 2 | |
| SHDN Pin Voltage | VSHDN | -50 | 50 | V | Absolute maximum | 2 | |
| REF/BYP Pin Voltage | VREF/BYP | -0.3 | 1 | V | Absolute maximum (Note 1) | 2 | |
| Operating Junction Temperature (E-, I-Grades) | TJ | -40 | 125 | °C | I-Grade | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | Storage | 2 | |
| Maximum Junction Temperature (TS8) | TJMAX | 150 | °C | TS8 package | 2 | ||
| Thermal Resistance Junction-to-Ambient (TS8) | θJA | 57 | 67 | °C/W | TS8 TSOT-23, 4-layer board, copper area 2500 to 50 mm2 topside | 20 | |
| Thermal Resistance Junction-to-Case (TS8) | θJC | 25 | °C/W | TS8 package | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | COPPER | Table 2. DC Package, 8-Lead DFN COPPER AREA | 20 |
CAD (KiCad official)
- Symbol:
LT3060ITS8#TRMPBF - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
lt3060its8-trmpbf-etched.step/lt3060its8-trmpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3060its8-trmpbf.step/lt3060its8-trmpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
1da5b0984b8afdd3, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).