LT3042EDD#PBF

{
  "slug": "lt3042edd-pbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "lt3042edd#pbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lt3042edd-pbf.kicad_sym",
    "lt3042edd-pbf.kicad_mod",
    "lt3042edd-pbf.glb",
    "lt3042edd-pbf.step",
    "lt3042edd-pbf.lbr",
    "docs/hero.png",
    "docs/lt3042edd-pbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt3042edd-pbf-hero.glb",
    "lt3042edd-pbf-hero.overlay.json",
    "lt3042edd-pbf-etched.glb"
  ],
  "component": {
    "mpn": "LT3042EDD#PBF",
    "manufacturer": "Analog Devices",
    "package": "DFN-10-EP(3x3)",
    "pin_count": 11,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893440226021376",
    "parts": {
      "symbol": "lt3042edd-pbf.kicad_sym",
      "footprint": "lt3042edd-pbf.kicad_mod",
      "model_3d": "lt3042edd-pbf-hero.glb",
      "model_3d_plain": "lt3042edd-pbf-etched.glb",
      "model_3d_step": "lt3042edd-pbf-etched.step",
      "model_3d_step_plain": "lt3042edd-pbf.step",
      "lbr": "lt3042edd-pbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C580009",
      "digikey": "505-LT3042EDD#PBF-ND",
      "mouser": "584-LT3042EDD#PBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T04:12:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LT3042EDD#PBF-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-LT3042EDD#PBF",
        "status": "found",
        "lifecycle": "Restricted Availability"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply pin; a 4.7µF bypass capacitor is the minimum, and the pin withstands reverse voltage with respect to GND, OUTS and OUT (±22V absolute maximum on IN)."
      },
      {
        "number": "2",
        "name": "IN",
        "type": "power_in",
        "description": "Second input supply pin, internally common with pin 1; a 4.7µF bypass capacitor is the minimum and reverse-voltage withstand applies as for pin 1."
      },
      {
        "number": "3",
        "name": "EN/UV",
        "type": "input",
        "description": "Enable/UVLO pin; pulling it low shuts the part down with quiescent current below 1µA, it turns on above a 1.24V rising threshold with 170mV hysteresis, and it must not be left floating (tie to IN if unused)."
      },
      {
        "number": "4",
        "name": "PG",
        "type": "output",
        "description": "Open-collector power good flag that pulls low when PGFB is below 300mV, must not be driven more than 0.3V below GND, and may be left floating if unused."
      },
      {
        "number": "5",
        "name": "ILIM",
        "type": "passive",
        "description": "Current limit programming pin; a resistor to GND sets the limit with a nominal 125mA•kΩ scale factor (Kelvin connected to GND), it sources current 1:400 of the output current for monitoring over a 0V to 300mV range, and it should be tied to GND if unused."
      },
      {
        "number": "6",
        "name": "PGFB",
        "type": "input",
        "description": "Power good feedback pin; PG releases when PGFB rises above 300mV with 7mV falling hysteresis, it sets the programmable threshold via an external divider from OUT, it activates fast start-up below 300mV, and it should be tied to IN if power good and fast start-up are not used."
      },
      {
        "number": "7",
        "name": "SET",
        "type": "passive",
        "description": "Error amplifier inverting input and regulation set-point; it sources a precision 100µA through the external resistor to GND so that VOUT = ISET • RSET over a 0V to 15V output range, and must not be driven more than 0.3V below GND."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin, which must be tied directly to the exposed backside pad and the PCB ground for proper electrical and thermal performance."
      },
      {
        "number": "9",
        "name": "OUTS",
        "type": "input",
        "description": "Output sense pin, the noninverting input of the error amplifier, which should be Kelvin connected directly to the output capacitor and load and must not be driven more than 0.3V below GND."
      },
      {
        "number": "10",
        "name": "OUT",
        "type": "power_out",
        "description": "Output pin that supplies the load and requires a minimum 4.7µF ceramic output capacitor with ESR below 50mΩ and ESL below 2nH for stability."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Exposed pad, electrically GND, which must be soldered to the PCB ground for electrical and thermal performance."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin-to-name mapping was taken from the PIN FUNCTIONS section (pages 12-13) and the DD package label ; KiCad type for PG was set to output because the datasheet describes an open-collector flag; ILIM and; Pins 1 and 2 are both listed as IN and pins 8 and 11 are both GND (pin 11 is the exposed pad); the d"
        ],
        "pages_sent": 13,
        "cost_usd": 0.1041,
        "at": "2026-10-18T04:11:59"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893440226021376",
        "pages": 32,
        "sha256": "c65c2b7406029d9b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 11,
        "described": 11,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lt3042edd-pbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          2.98,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "738e2eb45860c11759f8e4f44ab26932b7c15e4d5d6c8c9ac22ae866a3e38711",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt3042edd-pbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          2.98,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "92cd20324da034a0a9bdad87707648a126be0460c4c6bbcc11ed97346435cc0c",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}