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LT3013EFE#PBF

Analog Devices · Pre-ordered Chips · TSSOP-16-EP

LT3013EFE#PBF from Analog Devices, in a TSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; the exposed pad is the electrical GND connection and must be soldered directly to the PC board.
2 NC unconnected No internal connection; connecting to a copper area can slightly improve thermal performance.
3 OUT power_out Regulator output supplying the load; a minimum 3.3μF output capacitor is required to prevent oscillations.
4 OUT power_out Regulator output supplying the load; a minimum 3.3μF output capacitor is required to prevent oscillations.
5 ADJ input Error amplifier input held at 1.24V referenced to ground, internally clamped to ±7V, with a 30nA bias current flowing into the pin; output range is 1.24V to 60V.
6 GND power_in Ground pin, connected to the exposed pad on the PC board.
7 PWRGD output Open-collector power-good flag with no internal pull-up, going high-impedance when output is above 90% of nominal and the CT capacitor has charged; maximum pull-down current in the low state is 50μA and the pin voltage rating is 80V to -0.5V.
8 GND power_in Ground pin.
9 GND power_in Ground pin.
10 CT passive Timing capacitor pin that sets the delay between the output reaching the PWRGD threshold and PWRGD going high-impedance; charging current is 3μA and the pin voltage rating is 7V to -0.5V.
11 SHDN input Shutdown input that turns the output off when pulled low; if unused it must be tied to a logic high or VIN, with an input voltage rating of ±80V.
12 NC unconnected No internal connection; connecting to a copper area can slightly improve thermal performance.
13 IN power_in Input supply pin with a 4V minimum input voltage; a 1μF to 10μF bypass capacitor is recommended when the device is far from the input filter capacitor, and the pin is rated ±80V.
14 IN power_in Input supply pin with a 4V minimum input voltage; a 1μF to 10μF bypass capacitor is recommended when the device is far from the input filter capacitor, and the pin is rated ±80V.
15 NC unconnected No internal connection; connecting to a copper area can slightly improve thermal performance.
16 GND power_in Ground pin.
17 GND power_in Exposed backside pad, an electrical connection for GND that must be soldered to the PC board for thermal and electrical performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16-EP
Category Interface ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Input Voltage (ILOAD = 250mA) 4 4.75 V ILOAD = 250mA 3
ADJ Pin Voltage VADJ 1.225 1.24 1.255 V VIN = 4V, ILOAD = 1mA 3
ADJ Pin Voltage VADJ 1.2 1.24 1.28 V 4.75V < VIN < 80V, 1mA < ILOAD < 250mA (over full operating temperature range) 3
Line Regulation 0.1 5 mV ΔVIN = 4V to 80V, ILOAD = 1mA 3
Load Regulation 7 12 mV VIN = 4.75V, ΔILOAD = 1mA to 250mA 3
Load Regulation 25 mV VIN = 4.75V, ΔILOAD = 1mA to 250mA (over full operating temperature range) 3
Dropout Voltage 160 230 mV VIN = VOUT(NOMINAL), ILOAD = 10mA 3
Dropout Voltage 300 mV VIN = VOUT(NOMINAL), ILOAD = 10mA (over full operating temperature range) 3
Dropout Voltage 250 340 mV VIN = VOUT(NOMINAL), ILOAD = 50mA 3
Dropout Voltage 420 mV VIN = VOUT(NOMINAL), ILOAD = 50mA (over full operating temperature range) 3
Dropout Voltage 400 490 mV VIN = VOUT(NOMINAL), ILOAD = 250mA 3
Dropout Voltage 620 mV VIN = VOUT(NOMINAL), ILOAD = 250mA (over full operating temperature range) 3
GND Pin Current 65 120 μA VIN = 4.75V, ILOAD = 0mA 3
GND Pin Current 3 mA VIN = 4.75V, ILOAD = 100mA 3
GND Pin Current 10 18 mA VIN = 4.75V, ILOAD = 250mA 3
ADJ Pin Bias Current IADJ 30 100 nA 3
Shutdown Threshold (VOUT Off to On) 1.3 2 V VOUT = Off to On 3
Shutdown Threshold (VOUT On to Off) 0.3 0.8 V VOUT = On to Off 3
SHDN Pin Current 0.3 2 μA VSHDN = 0V 3
SHDN Pin Current 0.1 1 μA VSHDN = 6V 3
Quiescent Current in Shutdown 1 5 μA VIN = 6V, VSHDN = 0V 3
PWRGD Trip Point 85 90 94 % % of nominal output voltage, output rising (over full operating temperature range) 3
PWRGD Output Low Voltage 140 250 mV IPWRGD = 50μA (over full operating temperature range) 3
Ripple Rejection 65 75 dB VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 250mA 3
Current Limit 250 mA VIN = 4.75V, ΔVOUT = -0.1V (over full operating temperature range) 3
Reverse Output Current 12 25 μA VOUT = 1.24V, VIN < 1.24V 3
IN Pin Voltage -80 80 V 2
OUT Pin Voltage -60 60 V 2
IN to OUT Differential Voltage -80 80 V 2
ADJ Pin Voltage -7 7 V 2
SHDN Pin Input Voltage -80 80 V 2
CT Pin Voltage -0.5 7 V 2
PWRGD Pin Voltage -0.5 80 V 2
Storage Temperature Range (TSSOP Package) -65 150 °C TSSOP package 2
Lead Temperature 300 °C FE16 soldering, 10 sec 2
Operating Junction Temperature Range (LT3013E) TJ -40 125 °C LT3013E (Notes 3, 10, 11) 2
Thermal Resistance, Junction-to-Ambient (TSSOP measured) θJA 40 °C/W 2500 sq mm copper area, 2500 sq mm topside board area, still air, 3/32 in FR-4 15
Thermal Resistance, Junction-to-Ambient (TSSOP measured) θJA 45 °C/W 1000 sq mm copper area, 2500 sq mm topside board area, still air 15
Thermal Resistance, Junction-to-Ambient (TSSOP measured) θJA 50 °C/W 225 sq mm copper area, 2500 sq mm topside board area, still air 15
Thermal Resistance, Junction-to-Ambient (TSSOP measured) θJA 62 °C/W 100 sq mm copper area, 2500 sq mm topside board area, still air 15
Thermal Resistance, Junction-to-Case (exposed pad) θJC 16 °C/W measured at exposed pad on back of die 15

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper pins have no internal connection; connecting NC pins to a copper area for heat dissipation provides a small 11

CAD (KiCad official)

  • Symbol: LT3013EFE#PBF
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lt3013efe-pbf-etched.step / lt3013efe-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3013efe-pbf.step / lt3013efe-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 285ab2e67f086b18, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF