LT1970ACFE#PBF

{
  "slug": "lt1970acfe-pbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Operational Amplifier, TSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "operational amplifier-comparator",
    "lt1970acfe#pbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lt1970acfe-pbf.kicad_sym",
    "lt1970acfe-pbf.kicad_mod",
    "lt1970acfe-pbf.glb",
    "lt1970acfe-pbf.step",
    "lt1970acfe-pbf.lbr",
    "docs/hero.png",
    "docs/lt1970acfe-pbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt1970acfe-pbf-hero.glb",
    "lt1970acfe-pbf-hero.overlay.json",
    "lt1970acfe-pbf-etched.glb"
  ],
  "component": {
    "mpn": "LT1970ACFE#PBF",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-20-EP",
    "pin_count": 21,
    "category": "Operational Amplifier/Comparator",
    "subcategory": "Operational Amplifier",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/1970afc.pdf",
    "parts": {
      "symbol": "lt1970acfe-pbf.kicad_sym",
      "footprint": "lt1970acfe-pbf.kicad_mod",
      "model_3d": "lt1970acfe-pbf-hero.glb",
      "model_3d_plain": "lt1970acfe-pbf-etched.glb",
      "model_3d_step": "lt1970acfe-pbf-etched.step",
      "model_3d_step_plain": "lt1970acfe-pbf.step",
      "lbr": "lt1970acfe-pbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C579964",
      "digikey": "505-LT1970ACFE#PBF-ND",
      "mouser": "584-LT1970ACFE#PBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T22:43:10Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LT1970ACFE#PBF-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-LT1970ACFE#PBF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VEE",
        "type": "power_in",
        "description": "Minus supply voltage connected to the die substrate, which must always be the most negative voltage applied to the part and may be negative or ground; any or all VEE pins may be used and unused ones must remain open."
      },
      {
        "number": "2",
        "name": "V–",
        "type": "power_in",
        "description": "Output stage negative supply that may equal VEE or be smaller in magnitude, carries only output stage current, can drive the base/gate of an external boost device, and should otherwise be decoupled to ground with a low ESR capacitor."
      },
      {
        "number": "3",
        "name": "OUT",
        "type": "output",
        "description": "Amplifier output and force connection of a Kelvin sensed load, normally tied to the external current sense resistor and SENSE+, and current limited to ±800mA typical."
      },
      {
        "number": "4",
        "name": "SENSE+",
        "type": "input",
        "description": "Positive current sense pin normally connected to the driven end of the external sense resistor; sourcing limit activates when VSENSE equals 1/10 of the VCSRC voltage and sinking limit when VSENSE equals -1/10 of the VCSNK voltage."
      },
      {
        "number": "5",
        "name": "FILTER",
        "type": "passive",
        "description": "Current sense filter pin normally left open or shorted to SENSE-, which can adapt the current sense response time with a 1nF to 100nF capacitor to SENSE- working with an internal 1k resistor."
      },
      {
        "number": "6",
        "name": "SENSE–",
        "type": "input",
        "description": "Negative current sense pin normally connected to the load end of the external sense resistor, with current limiting activating at VSENSE equal to 1/10 of VCSRC (sourcing) or -1/10 of VCSNK (sinking)."
      },
      {
        "number": "7",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage for all circuitry except the output transistors, with total VCC to VEE supply between 3.5V and 36V, VCC always greater than or equal to V+, and decoupled to ground with a low ESR capacitor."
      },
      {
        "number": "8",
        "name": "–IN",
        "type": "input",
        "description": "Inverting amplifier input that may be any voltage from VEE - 0.3V to VEE + 36V and stays high impedance at all times, and must never go below VEE - 0.3V even transiently."
      },
      {
        "number": "9",
        "name": "+IN",
        "type": "input",
        "description": "Noninverting amplifier input that may be any voltage from VEE - 0.3V to VEE + 36V and stays high impedance at all times, and must never go below VEE - 0.3V even transiently."
      },
      {
        "number": "10",
        "name": "VEE",
        "type": "power_in",
        "description": "Minus supply voltage connected to the die substrate, which must always be the most negative voltage applied to the part; any or all VEE pins may be used and unused ones must remain open."
      },
      {
        "number": "11",
        "name": "VEE",
        "type": "power_in",
        "description": "Minus supply voltage connected to the die substrate, which must always be the most negative voltage applied to the part; any or all VEE pins may be used and unused ones must remain open."
      },
      {
        "number": "12",
        "name": "VCSNK",
        "type": "input",
        "description": "Sink current limit control voltage input that sets the sink limit at a sense voltage of -1.0 • VVCSNK/10, may be set between VCOMMON and VCOMMON + 6V, and is linear except below 60mV with a typical 4mV minimum VSENSE set point."
      },
      {
        "number": "13",
        "name": "VCSRC",
        "type": "input",
        "description": "Source current limit control voltage input that sets the source limit at a sense voltage of VVCSRC/10, may be set between VCOMMON and VCOMMON + 6V, and is linear except below 60mV with a typical 4mV minimum VSENSE set point."
      },
      {
        "number": "14",
        "name": "COMMON",
        "type": "passive",
        "description": "Reference pin for the control and ENABLE inputs and flag outputs, which may be at any potential between VEE and VCC - 3V and is normally connected to ground."
      },
      {
        "number": "15",
        "name": "ENABLE",
        "type": "input",
        "description": "TTL-level digital enable input that turns off the amplifier output and drops supply current to less than 1mA when taken low, and can be used to force zero output current."
      },
      {
        "number": "16",
        "name": "ISRC",
        "type": "output",
        "description": "Open-collector sourcing current limit flag that pulls low whenever the sourcing current limit amplifier controls the output, sinks up to 10mA, may be wire-ORed with ISNK and TSD, and may be left open if unused."
      },
      {
        "number": "17",
        "name": "ISNK",
        "type": "output",
        "description": "Open-collector sinking current limit flag that pulls low whenever the sinking current limit amplifier controls the output, sinks up to 10mA, may be wire-ORed with ISRC and TSD, and may be left open if unused."
      },
      {
        "number": "18",
        "name": "TSD",
        "type": "output",
        "description": "Open-collector thermal shutdown flag that pulls low when the internal thermal shutdown activates at a typical die temperature of 160°C, sinks up to 10mA, may be wire-ORed with ISRC and ISNK, and may be left open if unused."
      },
      {
        "number": "19",
        "name": "V+",
        "type": "power_in",
        "description": "Output stage positive supply that may equal VCC or be smaller in magnitude, carries only output stage current, can drive the base/gate of an external boost device, and should otherwise be decoupled to ground with a low ESR capacitor."
      },
      {
        "number": "20",
        "name": "VEE",
        "type": "power_in",
        "description": "Minus supply voltage connected to the die substrate, which must always be the most negative voltage applied to the part; any or all VEE pins may be used and unused ones must remain open."
      },
      {
        "number": "21",
        "name": "Exposed Pad",
        "type": "power_in",
        "description": "Exposed backside of the package electrically connected to the VEE pins on the die, to be soldered to a heat spreading PC board pad that is electrically connected to VEE."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: COMMON is a reference pin for control inputs and flag outputs with no fitting ERC class; set to pass; The top-view pin configuration text on page 2 is jumbled; pin assignments for 1-11 and 20 follow the"
        ],
        "pages_sent": 10,
        "cost_usd": 0.1,
        "at": "2026-10-30T22:42:46"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/1970afc.pdf",
        "pages": 24,
        "sha256": "0c1660be2dc25164",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 21,
        "described": 21,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
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    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.41,
          6.5,
          1.2
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1f80082f61f85a3c3bdf5cee484b5b3f3067837e23819d98896a7a55ad12d19b",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt1970acfe-pbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          6.5,
          1.2
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "16adc9b960f7872fd39bfb205fef7ac2b47fe43e956529e8a61f8baf2e6849cd",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "FE20 (CA) TSSOP",
      "source_page": 22,
      "E1": {
        "nom_mm": 4.4,
        "range_mm": [
          4.3,
          4.5
        ]
      },
      "E": {
        "nom_mm": 6.4,
        "range_mm": [
          6.4,
          6.6
        ]
      },
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "lt1970acfe-pbf.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}