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LT1763IS8-5#TRPBF

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Analog Devices Linear Voltage Regulators (LDO), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LT1763IS8-5#TRPBF

Analog Devices · Linear Voltage Regulators (LDO) · SO-8

LT1763IS8-5#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Output pin supplies power to the load and requires a minimum output capacitor of 3.3µF to prevent oscillations.
2 SENSE input For the fixed LT1763-5 this is the error amplifier input, optimally connected to OUT, with a 10µA bias current at nominal output voltage and the ability to be pulled below ground.
3 GND power_in Ground pin, connected directly to the bottom of the output voltage-setting divider for optimum load regulation.
4 BYP passive Bypass pin clamped internally to ±0.6V, where a capacitor up to 0.01µF from the output reduces output noise to a typical 20µVRMS over 10Hz to 100kHz, and it must be left unconnected if not used.
5 SHDN input Shutdown pin turns the output off when pulled low, can be driven by 5V logic or open-collector logic with a pull-up resistor, and must be connected to VIN if unused.
6 GND power_in Ground pin, which should be connected to the other GND pins for proper load regulation.
7 GND power_in Ground pin, which should be connected to the other GND pins for proper load regulation.
8 IN power_in Input supply pin, which should have a 1µF to 10µF bypass capacitor when far from the main input filter, and withstands reverse input voltages without reverse current flow.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Operating Voltage (C, I grade) 1.8 2.3 V ILOAD = 500mA, C/I grade (Notes 3, 11) 4
Regulated Output Voltage LT1763-5 4.95 5 5.05 V VIN = 5.5V, ILOAD = 1mA 4
Regulated Output Voltage LT1763-5 (full operating temperature range) 4.875 5 5.125 V 6V < VIN < 20V, 1mA < ILOAD < 500mA, full operating temperature range 4
Line Regulation LT1763-5 1 5 mV ∆VIN = 5.5V to 20V, ILOAD = 1mA 4
Load Regulation LT1763-5 12 25 mV VIN = 6V, ∆ILOAD = 1mA to 500mA 4
Load Regulation LT1763-5 (full operating temperature range) 50 mV VIN = 6V, ∆ILOAD = 1mA to 500mA, full operating temperature range 4
Dropout Voltage 0.13 0.19 V VIN = VOUT(NOMINAL), ILOAD = 10mA 4
Dropout Voltage (full operating temperature range) 0.25 V VIN = VOUT(NOMINAL), ILOAD = 10mA, full operating temperature range 4
Dropout Voltage 0.17 0.22 V VIN = VOUT(NOMINAL), ILOAD = 50mA 4
Dropout Voltage (full operating temperature range) 0.32 V VIN = VOUT(NOMINAL), ILOAD = 50mA, full operating temperature range 4
Dropout Voltage 0.2 0.24 V VIN = VOUT(NOMINAL), ILOAD = 100mA 4
Dropout Voltage (full operating temperature range) 0.34 V VIN = VOUT(NOMINAL), ILOAD = 100mA, full operating temperature range 4
Dropout Voltage 0.3 0.35 V VIN = VOUT(NOMINAL), ILOAD = 500mA 4
Dropout Voltage (full operating temperature range) 0.45 V VIN = VOUT(NOMINAL), ILOAD = 500mA, full operating temperature range 4
GND Pin Current 30 75 µA VIN = VOUT(NOMINAL), ILOAD = 0mA 5
GND Pin Current 65 120 µA VIN = VOUT(NOMINAL), ILOAD = 1mA 5
GND Pin Current 1.1 1.6 mA VIN = VOUT(NOMINAL), ILOAD = 50mA 5
GND Pin Current 2 3 mA VIN = VOUT(NOMINAL), ILOAD = 100mA 5
GND Pin Current 5 8 mA VIN = VOUT(NOMINAL), ILOAD = 250mA 5
GND Pin Current 11 16 mA VIN = VOUT(NOMINAL), ILOAD = 500mA 5
Current Limit (C, I grade) 520 mA VIN = VOUT(NOMINAL) + 1V or 2.3V (Note 12), ∆VOUT = -0.1V 5
Ripple Rejection 50 65 dB VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA 5
Reverse Output Current LT1763-5 10 20 µA VOUT = 5V, VIN < 5V (Note 10) 5
Input Reverse Leakage Current 1 mA VIN = -20V, VOUT = 0V 5
Shutdown Threshold (Off to On) 0.25 0.8 V VOUT = Off to On, full operating temperature range 4
Shutdown Threshold (On to Off) 0.65 2 V VOUT = On to Off, full operating temperature range 4
SHDN Pin Current 1 µA VSHDN = 20V (Note 9) 4
Quiescent Current in Shutdown 0.1 1 µA VIN = 6V, VSHDN = 0V 4
SHDN Pin Current 0.1 µA VSHDN = 0V (Note 9) 4
Output Voltage Noise 20 µVRMS COUT = 10µF, CBYP = 0.01µF, ILOAD = 500mA, BW = 10Hz to 100kHz 4
IN Pin Voltage VIN -20 20 V ±20V 2
OUT Pin Voltage VOUT -20 20 V ±20V 2
Input to Output Differential Voltage -20 20 V ±20V 2
SENSE Pin Voltage -20 20 V ±20V (fixed-output SENSE pin, pin 2 on SO-8) 2
BYP Pin Voltage -0.6 0.6 V ±0.6V 2
SHDN Pin Voltage -20 20 V ±20V 2
Storage Temperature Range (S8 package) -65 150 °C S8 package 2
Lead Temperature (Soldering, 10 sec) (S8 package) 300 °C S8 package, 10 sec soldering 2
Operating Junction Temperature Range (C, I grade) TJ -40 125 °C C, I grade (Note 2) 2
Maximum Junction Temperature (S8 package) TJMAX 150 °C S8 package 2
Junction-to-Ambient Thermal Resistance (S8 package) θJA 70 °C/W S8 package, as printed in pin configuration section 2
Junction-to-Case Thermal Resistance (S8 package) θJC 35 °C/W S8 package 2
Junction-to-Ambient Thermal Resistance (SO-8, Table 2) θJA 60 °C/W Topside copper 2500mm2, backside 2500mm2, board area 2500mm2 17
Junction-to-Ambient Thermal Resistance (SO-8, Table 2) θJA 68 °C/W Topside copper 225mm2, backside 2500mm2, board area 2500mm2 17
Junction-to-Ambient Thermal Resistance (SO-8, Table 2) θJA 74 °C/W Topside copper 100mm2, backside 2500mm2, board area 2500mm2 17
Junction-to-Ambient Thermal Resistance (SO-8, Table 2) θJA 86 °C/W Topside copper 50mm2, backside 2500mm2, board area 2500mm2 17

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts COPPER Table 1. DE Package, 12-Lead DFN COPPER AREA 16

CAD (KiCad official)

  • Symbol: LT1763IS8-5#TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1763is8-5-trpbf-etched.step / lt1763is8-5-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1763is8-5-trpbf.step / lt1763is8-5-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 2bc1aa72821928b4, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF