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LT1763CS8-5#TRPBF

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Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LT1763CS8-5#TRPBF

Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SO-8

LT1763CS8-5#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulator output that supplies the load and requires a minimum 3.3µF output capacitor to prevent oscillation, with larger capacitors needed for large transient loads.
2 SENSE/ADJ input On the LT1763-5 fixed-output part this is the SENSE input to the error amplifier, best connected to OUT at the load; it can be pulled below ground in dual-supply systems and still allow start-up and operation.
3 GND power_in Ground pin; connect the bottom of the output voltage setting divider directly to the GND pins for optimum load regulation.
4 BYP passive Bypass pin clamped internally to ±0.6V; a capacitor of up to 0.01µF from OUT lowers output noise to a typical 20µVRMS over 10Hz to 100kHz, and the pin must be left unconnected if not used.
5 SHDN input Shutdown pin where the output turns off when pulled low, driven by 5V logic or open-collector logic with a pull-up resistor, and it must be connected to IN if unused.
6 GND power_in Ground pin; connect the bottom of the output voltage setting divider directly to the GND pins for optimum load regulation.
7 GND power_in Ground pin; connect the bottom of the output voltage setting divider directly to the GND pins for optimum load regulation.
8 IN power_in Power input with a wide 1.8V to 20V input range, where a 1µF to 10µF bypass capacitor is recommended if the device is more than six inches from the main input filter capacitor.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Operating Voltage 1.8 2.3 V C, I Grade: ILOAD = 500mA 4
Regulated Output Voltage (LT1763-5) VOUT 4.95 5 5.05 V VIN = 5.5V, ILOAD = 1mA 4
Regulated Output Voltage (LT1763-5) VOUT 4.875 5 5.125 V 6V < VIN < 20V, 1mA < ILOAD < 500mA; l = full operating temperature range 4
Line Regulation (LT1763-5) 1 5 mV ∆VIN = 5.5V to 20V, ILOAD = 1mA 4
Load Regulation (LT1763-5) 12 25 mV VIN = 6V, ∆ILOAD = 1mA to 500mA 4
Load Regulation (LT1763-5) 50 mV VIN = 6V, ∆ILOAD = 1mA to 500mA; l = full operating temperature range 4
Dropout Voltage VDROPOUT 0.13 0.19 V VIN = VOUT(NOMINAL), ILOAD = 10mA 4
Dropout Voltage VDROPOUT 0.25 V VIN = VOUT(NOMINAL), ILOAD = 10mA; l = full operating temperature range 4
Dropout Voltage VDROPOUT 0.17 0.22 V VIN = VOUT(NOMINAL), ILOAD = 50mA 4
Dropout Voltage VDROPOUT 0.32 V VIN = VOUT(NOMINAL), ILOAD = 50mA; l = full operating temperature range 4
Dropout Voltage VDROPOUT 0.2 0.24 V VIN = VOUT(NOMINAL), ILOAD = 100mA 4
Dropout Voltage VDROPOUT 0.34 V VIN = VOUT(NOMINAL), ILOAD = 100mA; l = full operating temperature range 4
Dropout Voltage VDROPOUT 0.3 0.35 V VIN = VOUT(NOMINAL), ILOAD = 500mA 4
Dropout Voltage VDROPOUT 0.45 V VIN = VOUT(NOMINAL), ILOAD = 500mA; l = full operating temperature range 4
GND Pin Current IGND 30 75 µA VIN = VOUT(NOMINAL), ILOAD = 0mA; max over full operating temperature range (l) 5
GND Pin Current IGND 65 120 µA VIN = VOUT(NOMINAL), ILOAD = 1mA; max over full operating temperature range (l) 5
GND Pin Current IGND 1.1 1.6 mA VIN = VOUT(NOMINAL), ILOAD = 50mA; max over full operating temperature range (l) 5
GND Pin Current IGND 2 3 mA VIN = VOUT(NOMINAL), ILOAD = 100mA; max over full operating temperature range (l) 5
GND Pin Current IGND 5 8 mA VIN = VOUT(NOMINAL), ILOAD = 250mA; max over full operating temperature range (l) 5
GND Pin Current IGND 11 16 mA VIN = VOUT(NOMINAL), ILOAD = 500mA; max over full operating temperature range (l) 5
Shutdown Threshold (Off-to-On) 0.25 0.8 V VOUT = Off to On; l = full operating temperature range 5
Shutdown Threshold (On-to-Off) 0.65 2 V VOUT = On to Off; l = full operating temperature range 5
Quiescent Current in Shutdown 0.1 1 µA VIN = 6V, VSHDN = 0V 5
Ripple Rejection 50 65 dB VIN – VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA 5
Current Limit 520 mA C, I Grade: VIN = VOUT(NOMINAL) + 1V or 2.3V, ∆VOUT = –0.1V 5
Input Reverse Leakage Current 1 mA VIN = –20V, VOUT = 0V; l = full operating temperature range 5
Reverse Output Current (LT1763-5) 10 20 µA VOUT = 5V, VIN < 5V 5
IN Pin Voltage -20 20 V 2
OUT Pin Voltage -20 20 V 2
Input to Output Differential Voltage -20 20 V 2
SENSE Pin Voltage -20 20 V 2
SHDN Pin Voltage -20 20 V 2
BYP Pin Voltage -0.6 0.6 V 2
Storage Temperature Range (S8 package) -65 150 °C S8 package 2
Lead Temperature (Soldering, 10 sec) (S8 package) 300 °C S8 package, 10 sec soldering 2
Operating Junction Temperature Range (C grade) TJ -40 125 °C C grade 2
Output Capacitor (minimum) COUT 3.3 µF Minimum output capacitor required to prevent oscillations 13
Output Capacitor ESR (maximum) ESR 3 Ω Minimum 3.3µF output capacitor 15
Bypass Capacitor (maximum) CBYP 0.01 µF Capacitor from output to BYP pin for reduced noise 13
Maximum Junction Temperature (S8 package) TJMAX 150 °C S8 package 2
Thermal Resistance Junction-to-Ambient (S8 package) θJA 70 °C/W S8 package 2
Thermal Resistance Junction-to-Case (S8 package) θJC 35 °C/W S8 package 2
Thermal Resistance Junction-to-Ambian (SO-8, board layout) θJA 60 °C/W Topside copper 2500mm2, backside copper 2500mm2, board area 2500mm2 17
Thermal Resistance Junction-to-Ambient (SO-8, board layout) θJA 60 °C/W Topside copper 1000mm2, backside copper 2500mm2, board area 2500mm2 17
Thermal Resistance Junction-to-Ambient (SO-8, board layout) θJA 68 °C/W Topside copper 225mm2, backside copper 2500mm2, board area 2500mm2 17
Thermal Resistance Junction-to-Ambient (SO-8, board layout) θJA 74 °C/W Topside copper 100mm2, backside copper 2500mm2, board area 2500mm2 17
Thermal Resistance Junction-to-Ambient (SO-8, board layout) θJA 86 °C/W Topside copper 50mm2, backside copper 2500mm2, board area 2500mm2 17

CAD (KiCad official)

  • Symbol: LT1763CS8-5#TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1763cs8-5-trpbf-etched.step / lt1763cs8-5-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1763cs8-5-trpbf.step / lt1763cs8-5-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 2bc1aa72821928b4, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF