LT1763CS8-1.8#TRPBF

{
  "slug": "lt1763cs8-1-8-trpbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "lt1763cs8-1.8#trpbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "README.md",
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    "lt1763cs8-1-8-trpbf.kicad_mod",
    "lt1763cs8-1-8-trpbf.glb",
    "lt1763cs8-1-8-trpbf.step",
    "lt1763cs8-1-8-trpbf.lbr",
    "docs/hero.png",
    "docs/lt1763cs8-1-8-trpbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt1763cs8-1-8-trpbf-hero.glb",
    "lt1763cs8-1-8-trpbf-hero.overlay.json",
    "lt1763cs8-1-8-trpbf-etched.glb"
  ],
  "component": {
    "mpn": "LT1763CS8-1.8#TRPBF",
    "manufacturer": "Analog Devices",
    "package": "SO-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590147227517169664",
    "parts": {
      "symbol": "lt1763cs8-1-8-trpbf.kicad_sym",
      "footprint": "lt1763cs8-1-8-trpbf.kicad_mod",
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      "model_3d_step": "lt1763cs8-1-8-trpbf-etched.step",
      "model_3d_step_plain": "lt1763cs8-1-8-trpbf.step",
      "lbr": "lt1763cs8-1-8-trpbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C579848",
      "digikey": "505-LT1763CS8-1.8#TRPBFTR-ND",
      "mouser": "584-1763CS8-1.8TRPBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T01:52:02Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LT1763CS8-1.8#TRPBFTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-1763CS8-1.8TRPBF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OUT",
        "type": "power_out",
        "description": "Output supplies power to the load and requires a minimum output capacitor of 3.3µF to prevent oscillations."
      },
      {
        "number": "2",
        "name": "SENSE",
        "type": "input",
        "description": "For the fixed-voltage LT1763-1.8, SENSE is the error amplifier input and should be connected to OUT for optimum regulation, with a bias current of 10µA at the nominal output voltage."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin; connect the bottom of the output voltage setting divider directly to the GND pins for optimum load regulation."
      },
      {
        "number": "4",
        "name": "BYP",
        "type": "passive",
        "description": "Bypass pin clamped internally to ±0.6V; a capacitor of up to 0.01µF from the output reduces output noise to a typical 20µVRMS over 10Hz to 100kHz, and the pin must be left unconnected if not used."
      },
      {
        "number": "5",
        "name": "SHDN",
        "type": "input",
        "description": "Shutdown pin; the output is off when SHDN is pulled low, it can be driven by 5V logic or open-collector logic with a pull-up resistor, and it must be connected to VIN if unused."
      },
      {
        "number": "6",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin, one of the GND pins (3, 6, 7) on the SO-8 package."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin, one of the GND pins (3, 6, 7) on the SO-8 package."
      },
      {
        "number": "8",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply pin; a bypass capacitor of 1µF to 10µF is sufficient, and the IN pin voltage is rated ±20V absolute maximum."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers come from the S8 TOP VIEW on page 2, which lists the pin numbers and names in a scramble; Pin 2 is shared as SENSE/ADJ across the family. For the LT1763-1.8 (fixed output) it is SENSE; ADJ a; The datasheet does not give a separate description for GND pins 6 and 7 beyond the shared GND pin de"
        ],
        "pages_sent": 10,
        "cost_usd": 0.071,
        "at": "2026-10-21T01:48:55"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590147227517169664",
        "pages": 22,
        "sha256": "2bc1aa72821928b4",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt1763cs8-1-8-trpbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "sha256": "3a00177493a7769d9e4a4038732e4fe369b0f5ade76328b9b16d3e462a033cde",
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}