component
LSG65R650HT
Public Made by Adomby adom
LONTEN MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LSG65R650HT
LONTEN · MOSFETs · TO-252
LSG65R650HT from LONTEN, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with a gate-source voltage limit of ±30 V (VGSS) and a typical threshold of 3.5 V (2.5 to 4.5 V). |
| 2 | D | passive | Drain, which is also the exposed tab; it is rated for 650 V drain-source (VDSS) and 7 A continuous at TC = 25°C (21 A pulsed). |
| 3 | S | passive | Source; carries the 7 A continuous body-diode forward current (IS) and is the return for the 650 V drain-source rating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LONTEN |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | BVDSS | 650 | V | VGS=0 V, ID=0.25 mA | 2 | ||
| Gate threshold voltage | VGS(th) | 2.5 | 3.5 | 4.5 | V | VDS=VGS, ID=0.25mA | 2 |
| Gate leakage current, Forward | IGSSF | 50 | nA | VGS=30 V, VDS=0 V | 2 | ||
| Gate leakage current, Reverse | IGSSR | -50 | nA | VGS=-30 V, VDS=0 V | 2 | ||
| Drain-source on-state resistance (Tj = 25°C) | RDS(on) | 0.55 | 0.65 | Ω | VGS=10 V, ID=3.5 A, Tj = 25°C | 2 | |
| Drain-source on-state resistance (Tj = 150°C) | RDS(on) | 1.43 | Ω | VGS=10 V, ID=3.5 A, Tj = 150°C | 2 | ||
| Gate resistance | RG | 5.7 | Ω | f=1 MHz, open drain | 2 | ||
| Input capacitance | Ciss | 480 | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Output capacitance | Coss | 325 | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Reverse transfer capacitance | Crss | 0.95 | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Turn-on delay time | td(on) | 12 | ns | VDD = 300V, ID = 3.5A | 2 | ||
| Rise time | tr | 6.13 | ns | RG = 10Ω, VGS=15V | 3 | ||
| Turn-off delay time | td(off) | 26 | ns | 3 | |||
| Fall time | tf | 3.3 | ns | 3 | |||
| Gate to source charge | Qgs | 4.2 | nC | VDD=480 V, ID=3.5A, VGS=0 to 10 V | 3 | ||
| Gate to drain charge | Qgd | 4 | nC | 3 | |||
| Gate charge total | Qg | 13.1 | nC | 3 | |||
| Gate plateau voltage | Vplateau | 5.1 | V | 3 | |||
| Diode forward voltage | VSD | 0.85 | V | VGS=0 V, IF=3.5A | 3 | ||
| Reverse recovery time | trr | 200 | ns | VR=50 V, IF=3.5A, dIF/dt=100 A/μs | 3 | ||
| Reverse recovery charge | Qrr | 1.6 | μC | 3 | |||
| Peak reverse recovery current | Irrm | 12.5 | A | 3 | |||
| Drain-source voltage | VDSS | 650 | V | 1 | |||
| Continuous drain current (TC = 25°C) | ID | 7 | A | TC = 25°C | 1 | ||
| Continuous drain current (TC = 100°C) | ID | 4.4 | A | TC = 100°C | 1 | ||
| Pulsed drain current | IDM | 21 | A | Note 1: limited by maximum junction temperature, maximum duty cycle 0.75 | 1 | ||
| Gate-source voltage | VGSS | -30 | 30 | V | 1 | ||
| Avalanche energy, single pulse | EAS | 120 | mJ | Note 2: IAS = 2A, VDD = 50V, starting Tj = 25°C | 1 | ||
| Avalanche current, repetitive | IAR | 7 | A | Note 3: repetitive rating, pulse width limited by maximum junction temperature | 1 | ||
| Operating and storage temperature range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Continuous diode forward current | IS | 7 | A | 1 | |||
| Diode pulse current | IS,pulse | 21 | A | 1 | |||
| Thermal resistance, junction-to-case (TO-251/TO-252/TO-220/TO-263) | RθJC | 2 | °C/W | 2 | |||
| Thermal resistance, junction-to-ambient (TO-251/TO-252/TO-220/TO-263) | RθJA | 62 | °C/W | 2 | |||
| Soldering temperature, wave soldering at leads | Tsold | 260 | °C | 1.6mm from case for 10s | 2 |
CAD (KiCad official)
- Symbol:
LSG65R650HT - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
lsg65r650ht-etched.step/lsg65r650ht-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lsg65r650ht.step/lsg65r650ht.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LONTEN datasheet (13 pp, sha256
8126bc36f8c7bf33, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LSG65R650HT
**LONTEN** · MOSFETs · TO-252
LSG65R650HT from LONTEN, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with a gate-source voltage limit of ±30 V (VGSS) and a typical threshold of 3.5 V (2.5 to 4.5 V). |
| 2 | D | passive | Drain, which is also the exposed tab; it is rated for 650 V drain-source (VDSS) and 7 A continuous at TC = 25°C (21 A pulsed). |
| 3 | S | passive | Source; carries the 7 A continuous body-diode forward current (IS) and is the return for the 650 V drain-source rating. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LONTEN |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | BVDSS | 650 | | | V | VGS=0 V, ID=0.25 mA | 2 |
| Gate threshold voltage | VGS(th) | 2.5 | 3.5 | 4.5 | V | VDS=VGS, ID=0.25mA | 2 |
| Gate leakage current, Forward | IGSSF | | | 50 | nA | VGS=30 V, VDS=0 V | 2 |
| Gate leakage current, Reverse | IGSSR | | | -50 | nA | VGS=-30 V, VDS=0 V | 2 |
| Drain-source on-state resistance (Tj = 25°C) | RDS(on) | | 0.55 | 0.65 | Ω | VGS=10 V, ID=3.5 A, Tj = 25°C | 2 |
| Drain-source on-state resistance (Tj = 150°C) | RDS(on) | | 1.43 | | Ω | VGS=10 V, ID=3.5 A, Tj = 150°C | 2 |
| Gate resistance | RG | | 5.7 | | Ω | f=1 MHz, open drain | 2 |
| Input capacitance | Ciss | | 480 | | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 |
| Output capacitance | Coss | | 325 | | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 |
| Reverse transfer capacitance | Crss | | 0.95 | | pF | VDS = 25 V, VGS = 0 V, f = 1 MHz | 2 |
| Turn-on delay time | td(on) | | 12 | | ns | VDD = 300V, ID = 3.5A | 2 |
| Rise time | tr | | 6.13 | | ns | RG = 10Ω, VGS=15V | 3 |
| Turn-off delay time | td(off) | | 26 | | ns | | 3 |
| Fall time | tf | | 3.3 | | ns | | 3 |
| Gate to source charge | Qgs | | 4.2 | | nC | VDD=480 V, ID=3.5A, VGS=0 to 10 V | 3 |
| Gate to drain charge | Qgd | | 4 | | nC | | 3 |
| Gate charge total | Qg | | 13.1 | | nC | | 3 |
| Gate plateau voltage | Vplateau | | 5.1 | | V | | 3 |
| Diode forward voltage | VSD | | 0.85 | | V | VGS=0 V, IF=3.5A | 3 |
| Reverse recovery time | trr | | 200 | | ns | VR=50 V, IF=3.5A, dIF/dt=100 A/μs | 3 |
| Reverse recovery charge | Qrr | | 1.6 | | μC | | 3 |
| Peak reverse recovery current | Irrm | | 12.5 | | A | | 3 |
| Drain-source voltage | VDSS | | | 650 | V | | 1 |
| Continuous drain current (TC = 25°C) | ID | | | 7 | A | TC = 25°C | 1 |
| Continuous drain current (TC = 100°C) | ID | | | 4.4 | A | TC = 100°C | 1 |
| Pulsed drain current | IDM | | | 21 | A | Note 1: limited by maximum junction temperature, maximum duty cycle 0.75 | 1 |
| Gate-source voltage | VGSS | -30 | | 30 | V | | 1 |
| Avalanche energy, single pulse | EAS | | | 120 | mJ | Note 2: IAS = 2A, VDD = 50V, starting Tj = 25°C | 1 |
| Avalanche current, repetitive | IAR | | | 7 | A | Note 3: repetitive rating, pulse width limited by maximum junction temperature | 1 |
| Operating and storage temperature range | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Continuous diode forward current | IS | | | 7 | A | | 1 |
| Diode pulse current | IS,pulse | | | 21 | A | | 1 |
| Thermal resistance, junction-to-case (TO-251/TO-252/TO-220/TO-263) | RθJC | | 2 | | °C/W | | 2 |
| Thermal resistance, junction-to-ambient (TO-251/TO-252/TO-220/TO-263) | RθJA | | 62 | | °C/W | | 2 |
| Soldering temperature, wave soldering at leads | Tsold | | | 260 | °C | 1.6mm from case for 10s | 2 |
## CAD (KiCad official)
- Symbol: `LSG65R650HT`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `lsg65r650ht-etched.step` / `lsg65r650ht-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lsg65r650ht.step` / `lsg65r650ht.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LONTEN datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884779923726336) (13 pp, sha256 `8126bc36f8c7bf33`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lsg65r650ht-datasheet.pdf)