LS7184N-S

{
  "slug": "ls7184n-s",
  "version": "0.1.0",
  "type": "component",
  "description": "LSI/CSI Interface - Specialized, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "ls7184n-s",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ls7184n-s.kicad_sym",
    "ls7184n-s.kicad_mod",
    "ls7184n-s.glb",
    "ls7184n-s.step",
    "ls7184n-s.lbr",
    "docs/hero.png",
    "docs/ls7184n-s-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ls7184n-s-hero.glb",
    "ls7184n-s-hero.overlay.json",
    "ls7184n-s-etched.glb"
  ],
  "component": {
    "mpn": "LS7184N-S",
    "manufacturer": "LSI/CSI",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/4d1d6b4bdc4142c2d22d4dbce66cd342.pdf",
    "parts": {
      "symbol": "ls7184n-s.kicad_sym",
      "footprint": "ls7184n-s.kicad_mod",
      "model_3d": "ls7184n-s-hero.glb",
      "model_3d_plain": "ls7184n-s-etched.glb",
      "model_3d_step": "ls7184n-s-etched.step",
      "model_3d_step_plain": "ls7184n-s.step",
      "lbr": "ls7184n-s.lbr"
    },
    "distributor_links": {
      "lcsc": "C3234980",
      "digikey": "2808-LS7184N-S-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T17:07:26Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2808-LS7184N-S-ND",
        "status": "found"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RBIAS",
        "type": "passive",
        "description": "Input for external component connection; a resistor between this input and VSS sets the output clock pulse width TOW, with an external resistor range of 2K to 10MΩ."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage terminal, operating from +3V to +12V relative to VSS."
      },
      {
        "number": "3",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply voltage terminal, the reference for VDD and the RBIAS resistor."
      },
      {
        "number": "4",
        "name": "A",
        "type": "input",
        "description": "Quadrature clock input A with built-in immunity to noise pulses shorter than 50ns (validation delay TVD); inhibited during directional output clocks."
      },
      {
        "number": "5",
        "name": "B",
        "type": "input",
        "description": "Quadrature clock input B with built-in immunity to noise pulses shorter than 50ns (validation delay TVD); inhibited during directional output clocks."
      },
      {
        "number": "6",
        "name": "MODE",
        "type": "input",
        "description": "3-state input selecting resolution: logic 0 gives x1, logic 1 gives x2, and float gives x4."
      },
      {
        "number": "7",
        "name": "UP/DN",
        "type": "output",
        "description": "Count direction output for LS7184N: goes high when A leads B (count UP) and goes low when A lags B (count DOWN)."
      },
      {
        "number": "8",
        "name": "CLK",
        "type": "output",
        "description": "Combined UP and DOWN clock output for LS7184N, consisting of low-going pulses; the counter must count on the rising edge of CLK."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN LS7184N-S is not listed in the datasheet. It names the SOIC variant as LS7184NS and the DIP "
        ],
        "pages_sent": 4,
        "cost_usd": 0.0079,
        "at": "2026-10-29T17:07:19"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/4d1d6b4bdc4142c2d22d4dbce66cd342.pdf",
        "pages": 4,
        "sha256": "a7ef811d7232123d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ls7184n-s.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ls7184n-s-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "76e4daad722e9d52ca0f5746e3d4e47231aba81bcf02f241e214a3af91e54c49",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}