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LS7184N-S

Public Made by Adom

by adom

LSI/CSI Interface - Specialized, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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LS7184N-S

LSI/CSI · Interface - Specialized · SOIC-8

LS7184N-S from LSI/CSI, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RBIAS passive Input for external component connection; a resistor between this input and VSS sets the output clock pulse width TOW, with an external resistor range of 2K to 10MΩ.
2 VDD power_in Positive supply voltage terminal, operating from +3V to +12V relative to VSS.
3 VSS power_in Negative supply voltage terminal, the reference for VDD and the RBIAS resistor.
4 A input Quadrature clock input A with built-in immunity to noise pulses shorter than 50ns (validation delay TVD); inhibited during directional output clocks.
5 B input Quadrature clock input B with built-in immunity to noise pulses shorter than 50ns (validation delay TVD); inhibited during directional output clocks.
6 MODE input 3-state input selecting resolution: logic 0 gives x1, logic 1 gives x2, and float gives x4.
7 UP/DN output Count direction output for LS7184N: goes high when A leads B (count UP) and goes low when A lags B (count DOWN).
8 CLK output Combined UP and DOWN clock output for LS7184N, consisting of low-going pulses; the counter must count on the rising edge of CLK.

Key specifications

Parameter Value
Manufacturer LSI/CSI
Package SOIC-8
Category Communication Interface Chip/UART/485/232
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 3 12 V 2
DC Supply Voltage VDD - VSS 16 V 2
Operating temperature TA -20 85 ºC 2
Storage temperature TSTG -55 150 ºC 2
Supply Current IDD 1.5 1.65 mA VDD=12V, all input frequencies=0 Hz and RBIAS=2MΩ 2
Logic 0 (MODE input) Vml 0.5 V - 2
Logic 0 Input Current (MODE) Iml 2.2 4.2 μA VDD = 3V 2
Logic 0 Input Current (MODE) Iml 3.5 6.9 μA VDD = 5V 2
Logic 0 Input Current (MODE) Iml 8.3 16.2 μA VDD = 12V 2
Logic 1 Input Current (MODE) Imh -2 -9.8 μA VDD = 3V 2
Logic 1 Input Current (MODE) Imh -3.4 -6.6 μA VDD = 5V 2
Logic 1 Input Current (MODE) Imh -8.2 -16 μA VDD = 12V 2
Input Current (A,B) IABlk 0 10 nA - 2
External Resistor RB 2 10 KΩ to MΩ - 2
Input to output Delay TDS 490 565 ns VDD = 3V 2
Input to output Delay TDS 220 345 ns VDD = 5V 2
Input to output Delay TDS 125 135 ns VDD = 12V 2
Sink Current Iol -3.4 mA VO = 0.5V, VDD = 3V 2
Sink Current Iol -4.8 mA VO = 0.5V, VDD = 5V 2
Sink Current Iol -7.2 mA VO = 0.5V, VDD = 12V 2
Source Current Ioh 1.7 mA VO = 2.5V, VDD = 3V 2
Source Current Ioh 2.2 mA VO = 4.5V, VDD = 5V 2
Source Current Ioh 3.1 mA VO = 11.5V, VDD = 12V 2
Output Clock Pulse Width TOW 540 ns VDD = 3V 2
Output Clock Pulse Width TOW 225 ns VDD = 5V 2
Output Clock Pulse Width TOW 112 ns VDD = 12V 2
Validation Delay TVD 450 ns VDD = 3V 2
Validation Delay TVD 200 ns VDD = 5V 2
Validation Delay TVD 90 ns VDD = 12V 2

CAD (KiCad official)

  • Symbol: LS7184N-S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ls7184n-s-etched.step / ls7184n-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ls7184n-s.step / ls7184n-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LSI/CSI datasheet (4 pp, sha256 a7ef811d7232123d, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF