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Contents

README

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LP54334SPF

LOWPOWER · DC-DC Converters · ESOP-8

LP54334SPF from LOWPOWER, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BST power_out Bootstrap pin that powers the high-side MOSFET gate driver, and a 0.1-µF capacitor must be connected between this pin and SW.
2 VIN power_in IC power supply input, with a recommended operating range of 4.5V to 32V and an absolute maximum of -0.3V to 34V to GND.
3 SW output Switching node of the converter, rated -0.3V to 34V to GND with a -3V to 34V limit for 5ns transients.
4 GND power_in Power ground of the IC, to which the thermal pad should be connected for good power dissipation.
5 FB input Feedback pin that sets the output voltage through a resistor divider, with a typical regulated FB voltage of 0.8V and an absolute maximum of -0.3V to 6.5V to GND.
6 NC unconnected No connection inside the device.
7 EN input Enable input that can also control power-up sequencing, with a logic-high threshold of 1.2V typical, a 1000kΩ internal pull-down, and an absolute maximum of -0.3V to 34V to GND.
8 NC unconnected No connection inside the device.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package ESOP-8
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 4.5 32 V 4
Output voltage VOUT 13.2 V 4
Inductor L 0.7 13 μH 4
Ambient temperature range TA -40 85 °C 4
Input decoupling capacitor CIN 4.7 100 μF 25V rating or higher 4
Output capacitor COUT 10 100 μF 10V rating or higher 4
VIN, SW to GND -0.3 34 V 4
SW to GND -3 34 V 5ns transient 4
EN to GND -0.3 34 V 4
FB to GND -0.3 6.5 V 4
BST to SW -0.3 5.5 V 4
BST to GND -0.3 34 V EN=Low 4
BST to GND -0.3 38 V EN=High 4
Junction Temperature Range TJ -40 150 °C 4
Maximum Soldering Temperature 260 °C at leads, 10 sec 4
ESD HBM (Human Body Model) 2 kV HBM 4
ESD CDM (Charged-device Model) 500 V CDM 4
Junction-to-Ambient Thermal Resistance θJA 63 °C/W 4
Input under voltage lockout threshold (VIN rising) VULVO_R 4.2 4.5 V VIN rising threshold; VIN=12V, TA=25°C 5
UVLO hysteresis VULVO_H 0.2 V VIN falling threshold 5
Input quiescent current Iq_VIN 300 µA No switching, EN=3V, FB=1.0V 5
Shutdown current ISD 4.5 µA EN=0V, VIN = 12V 5
Low-side valley current limit ILIM 2.6 3.6 A TA=25oC 5
Reference voltage Vref 0.792 0.8 0.808 V TA=25oC 5
High-side FET on resistance Rdson_HS 130 mΩ VIN=12V 5
Low-side FET on resistance Rdson_LS 85 mΩ VIN=12V 5
Switching frequency Fsw 500 kHz 5
Minimum on-time ton-min 50 ns Not production tested, guaranteed by design 5
Minimum off-time toff-min 100 ns VFB=Vref - 0.2V; not production tested 5
Hiccup on time ton-hiccup 1 ms Not production tested, guaranteed by design 5
Hiccup waiting time toff-hiccup 10 ms Not production tested, guaranteed by design 5
EN delay time td 250 us From EN high to first switching; not production tested 5
Soft-start time tss 600 us From first switching to 95%Vref; not production tested 5
Thermal shutdown threshold (rising) Tjsd 160 °C Rising threshold 5
Thermal shutdown threshold (falling) Tjsd 135 °C Falling threshold 5
FB pin leakage current Ileak_FB 0.01 µA 5
EN pin logic high threshold VH 1.14 1.2 1.26 V EN Rising threshold 6
EN pin threshold hysteresis Vhys 0.1 V 6
EN pin internal pull-down resistance 1000 kΩ 6
OVP threshold (rising) VOVP_rise 108 110 112 % VOUT rising edge, reference to Vref 6
OVP hysteresis (falling) VOVP_fall 105 % VOUT falling edge, reference to Vref 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper ⚫ Place the input capacitors (C4, 0603 or 0402 size) as close as possible to VIN pin and GND pin and use shortest copper trace connection or GND plane, this is the most critical path and should have t 15

CAD (KiCad official)

  • Symbol: LP54334SPF
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: lp54334spf-etched.step / lp54334spf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp54334spf.step / lp54334spf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (19 pp, sha256 a4b8cab263ab581e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF