# LP5309B3F

**LOWPOWER(微源半导体)** · Power Distribution Switches · SOT-23

LP5309B3F from LOWPOWER(微源半导体), in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply and input of the power switch, tolerating up to 32V (absolute max) with over-voltage protection at 6V and under-voltage lockout at 2.7V. |
| 2 | GND | power_in | Ground. |
| 3 | VOUT | power_out | Output of the power switch, rated -0.3V to 7V to GND with an integrated output discharge. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER(微源半导体) |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN to GND |  | -0.3 |  | 32 | V |  | 3 |
| VOUT to GND |  | -0.3 |  | 7 | V |  | 3 |
| Maximum Junction Temperature (TA) |  |  |  | 150 | °C |  | 3 |
| Maximum Soldering Temperature |  |  |  | 260 | °C | at leads, 10 seconds | 3 |
| Input Voltage |  | 3 |  | 5.5 | V |  | 3 |
| Output Current |  | 0 |  | 1.5 | A |  | 3 |
| Ambient Temperature |  | -40 |  | 85 | °C |  | 3 |
| Maximum Power Dissipation (PD) | PD |  |  | 0.6 | W | TA <= 25℃ | 3 |
| Thermal Resistance (θJA) | θJA |  | 203 |  | °C/W | 2S2P JEDEC standard PCB (Note 2) | 3 |
| ESD HBM (Human Body Model, JEDEC JS-001) |  | -4000 |  | 4000 | V | JEDEC JS-001 | 3 |
| ESD CDM (Charged Device Model, JEDEC JS-002) |  | -500 |  | 500 | V | JEDEC JS-002 | 3 |
| On-resistance | RDS(ON) |  | 145 | 175 | mΩ | VIN = 5V, IOUT=200mA, TA=25°C | 4 |
| Input quiescent current | IQ |  | 90 | 150 | μA | VIN = 5V, OUT floating, VENB = 0V | 4 |
| Under-Voltage Lockout level (falling) | VUVLO_F | 2.6 | 2.7 | 2.8 | V | VIN voltage falling | 4 |
| Under-Voltage Lockout level (rising) | VUVLO_R | 2.7 | 2.8 | 2.9 | V | VIN voltage rising | 4 |
| Over current protection level | IOCP |  | 2.53 |  | A | VIN = 5V, TA=25°C | 4 |
| OCP accuracy (IOCP > 150mA) | ACCOCP |  | 15 |  | % | VIN = 5V, TA=25°C, IOCP > 150mA | 4 |
| OCP accuracy (IOCP < 150mA) | ACCOCP |  | 25 |  | % | VIN = 5V, TA=25°C, IOCP < 150mA | 4 |
| Over-Voltage Protection response time | tOVP |  | 30 | 50 | ns | VIN rising from 5V with 30V/μs, ROUT = 100Ω, COUT = 0, time from VIN > VOVP_R to OUT voltage stop rising | 4 |
| Input shutdown current | ISD |  | 1 |  | μA | VIN = 5V, OUT grounded, VENB = 5V | 4 |
| Over-Voltage Protection level (falling) | VOVP_F |  | 5.9 |  | V | VIN voltage falling | 4 |
| Over-Voltage Protection level (rising) | VOVP_R |  | 6 |  | V | VIN voltage rising | 4 |
| Short circuit protection level | ISHORT |  | 5 |  | A | VIN = 5V, TA=25°C | 4 |
| Output auto discharge | RDIS |  | 3 |  | kΩ | VIN = 5V, VEN = 0V | 4 |
| Enable logic high voltage level | VIH |  | 1.4 |  | V | VIN = 2.4V to 6V | 4 |
| Enable logic high voltage level (VIL row, printed name) | VIL |  | 0.4 |  | V | VIN = 2.4V to 6V | 4 |
| OCP qualification time | tOCP_QUAL |  | 150 |  | μs | VIN = 5V, TA = 25°C, qualification time from IOUT hits IOCP to switch turned off | 4 |
| Load switch turned on delay | tDON |  | 10 |  | ms | VIN = 5V, ROUT = 100Ω, COUT = 22μF, time from enabled to VOUT = 0.5 | 4 |
| Output rising time | tR |  | 450 |  | μs | VIN = 5V, ROUT = 100Ω, COUT = 22μF, time from VOUT = 0.1×VIN to 0.9×VIN | 4 |
| Load switch turned off delay | tOFF |  | 10 |  | μs | VIN = 5V, ROUT = 500Ω, COUT = 0.1μF, time from disabled to VOUT = 0.9×VIN | 4 |
| Thermal shutdown trigger | TSD |  | 150 |  | °C | Temperature rising | 4 |
| Thermal shutdown release | TSD_REL |  | 130 |  | °C | Temperature falling | 4 |

## CAD (KiCad official)

- Symbol: `LP5309B3F`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lp5309b3f-etched.step` / `lp5309b3f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp5309b3f.step` / `lp5309b3f.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LOWPOWER(微源半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8616359659607912448) (8 pp, sha256 `92bf10761ea8bfde`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lp5309b3f-datasheet.pdf)