# LP2301LT1G

**LRC** · MOSFETs · SOT-23

LP2301LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET; the datasheet gives the gate-to-source voltage limit as ±8 V (VGS = ±8 V test condition, VGS rating ±8 V). |
| 2 | S | passive | Source of the P-channel MOSFET, the reference terminal for VGS; the drain-to-source voltage rating is -20 V. |
| 3 | D | passive | Drain of the P-channel MOSFET; the drain-to-source breakdown voltage is -20 V minimum at VGS = 0 V, ID = -250 µA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain−to−Source Breakdown Voltage | V(BR)DSS | -20 |  |  | V | VGS = 0 V, ID = -250 μA | 2 |
| Gate Threshold Voltage | VGS(TH) | -0.4 |  | 0.9 | V | VGS = VDS, ID = -250 μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | VDS = -9.6 V, VGS = 0 V | 2 |
| Gate−to−Source Leakage Current | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ±8 V | 2 |
| Static Drain−to−Source On Resistance | RDS(on) |  | 69 | 100 | mΩ | VGS = -4.5 V, ID = -2.8 A | 2 |
| Static Drain−to−Source On Resistance | RDS(on) |  | 83 | 150 | mΩ | VGS = -2.5 V, ID = -2 A | 2 |
| Max. Diode Forward Current | IS |  |  | -2.4 | A |  | 2 |
| Forward Diode Voltage | VSD |  | -0.8 | -1.2 | V | VGS = 0 V, IS = -0.75 A | 2 |
| Drain−to−Source Voltage | VDSS |  |  | -20 | V |  | 1 |
| Gate−to−Source Voltage | VGS | -8 |  | 8 | V |  | 1 |
| Continuous Drain Current | ID |  |  | -2.3 | A | TA = 25°C | 1 |
| Pulsed Drain Current | IDM |  |  | -8 | A |  | 1 |
| Maximum Power Dissipation | PD |  |  | 0.9 | W |  | 1 |
| Maximum Power Dissipation | PD |  |  | 0.57 | W |  | 1 |
| Operating and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance, Junction to Ambient | RθJA |  |  | 175 | °C/W | Note 1: device mounted on 1 in² FR4 board with 2 oz copper | 1 |

## CAD (KiCad official)

- Symbol: `LP2301LT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lp2301lt1g-etched.step` / `lp2301lt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2301lt1g.step` / `lp2301lt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175439077855232) (5 pp, sha256 `9ff86087e10c62c0`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lp2301lt1g-datasheet.pdf)