# LP2301BLT1G

**LRC** · MOSFETs · SOT-23

LP2301BLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET; gate-source voltage limit is ±8 V. |
| 2 | S | passive | Source of the P-channel MOSFET; drain-source voltage is -20 V and continuous drain current is -2.8 A. |
| 3 | D | passive | Drain of the P-channel MOSFET; VDS is -20 V, continuous ID is -2.8 A and pulsed IDM is -8 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -20 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -8 |  | 8 | V |  | 1 |
| Continuous Drain Current | ID | -2.8 |  |  | A |  | 1 |
| Pulsed Drain Current | IDM | -8 |  |  | A | Pulse width limited by maximum junction temperature (note 1) | 1 |
| Maximum Power Dissipation | PD |  |  | 0.9 | W | TA = 25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 0.57 | W | TA = 75°C | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 1 |
| Junction-to-Ambient Thermal Resistance | RqJA |  |  | 140 | °C/W | PCB mounted, 1 in² 2oz Cu PCB (note 2) | 1 |
| Drain-Source Breakdown Voltage | BVDSS | -20 |  |  | V | VGS = 0V, ID = -250uA | 2 |
| Drain-Source On-State Resistance | RDS(on) |  | 69 | 100 | mΩ | VGS = -4.5V, ID = -2.8A | 2 |
| Drain-Source On-State Resistance | RDS(on) |  | 83 | 150 | mΩ | VGS = -2.5V, ID = -2.0A | 2 |
| Gate Threshold Voltage | VGS(th) | -0.4 |  | -0.9 | V | VDS = VGS, ID = -250uA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | uA | VDS = -9.6V, VGS = 0V | 2 |
| Gate Body Leakage | IGSS | -100 |  | 100 | nA | VGS = ±8V, VDS = 0V | 2 |
| Forward Transconductance | gfs | 6.5 |  |  | S | VDS = -5V, ID = -4.0A | 2 |
| Max. Diode Forward Current | IS |  |  | -2.4 | A |  | 2 |
| Diode Forward Voltage | VSD |  | -0.8 | -1.2 | V | IS = -0.75A, VGS = 0V | 2 |

## CAD (KiCad official)

- Symbol: `LP2301BLT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lp2301blt1g-etched.step` / `lp2301blt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2301blt1g.step` / `lp2301blt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586176653705269248) (5 pp, sha256 `c2202879fe0519f7`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lp2301blt1g-datasheet.pdf)