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LNP4606T1G

LRC · MOSFETs · SOP-8

LNP4606T1G from LRC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (top device in the package diagram), N-channel 30 V, ID 7 A at TA=25°C.
2 G1 input Gate of MOSFET 1 (N-channel), VGS rated ±20 V maximum.
3 S2 passive Source of MOSFET 2 (bottom device in the package diagram), P-channel 30 V, ID -6 A at TA=25°C.
4 G2 input Gate of MOSFET 2 (P-channel), VGS rated ±20 V maximum.
5 D2 passive Drain of MOSFET 2 (P-channel), VDS rated 30 V; shorted to pin 6 in the diagram.
6 D2 passive Drain of MOSFET 2 (P-channel), VDS rated 30 V; shorted to pin 5 in the diagram.
7 D1 passive Drain of MOSFET 1 (N-channel), VDS rated 30 V; shorted to pin 8 in the diagram.
8 D1 passive Drain of MOSFET 1 (N-channel), VDS rated 30 V; shorted to pin 7 in the diagram.

Key specifications

Parameter Value
Manufacturer LRC
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage (N-Channel) VDS 30 V 1
Drain-to-Source Voltage (P-Channel) VDS 30 V 1
Gate-to-Source Voltage (N-Channel) VGS -20 20 V 1
Gate-to-Source Voltage (P-Channel) VGS -20 20 V 1
Continuous Drain Current (N-Channel) ID 7 A TA =25°C 1
Continuous Drain Current (N-Channel) ID 4.8 A TA =70°C 1
Continuous Drain Current (P-Channel) ID -6 A TA =25°C 1
Continuous Drain Current (P-Channel) ID -4.5 A TA =70°C 1
Pulsed Drain Current (N-Channel) IDM 28 A 1
Pulsed Drain Current (P-Channel) IDM -25 A 1
Power Dissipation PD 2.1 W TA =25°C 1
Power Dissipation PD 1.3 W TA =70°C 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 150 ºC 1
Thermal Resistance, Junction-to-Ambient RΘJA 62.5 ℃/W t ≤10 s 1
Thermal Resistance, Junction-to-Ambient RΘJA 110 ℃/W Steady State 1
Drain-Source Breakdown Voltage (P-Channel) VBRDSS -30 V VGS = 0, ID = -250μA 2
Gate-Source Threshold Voltage (P-Channel) VGS(th) -1 -3 V VDS =VGS , ID =-250μA 2
Gate-Body Leakage Current (P-Channel) IGSS -1 1 µA VDS =0V, VGS = ± 20V 2
Zero Gate Voltage Drain Current (P-Channel) IDSS -1 µA VDS = -24 V, VGS = 0 V 2
Drain-Source On-Resistance (P-Channel) RDS(ON) 45 52 mΩ VGS = -10 V, ID = -5 A 2
Drain-Source On-Resistance (P-Channel) RDS(ON) 55 75 mΩ VGS = -4.5 V, ID = -4 A 2
Diode Forward Voltage (P-Channel) VSD -0.77 -1 V IS = -1 A, VGS = 0 V 2
Drain-Source Breakdown Voltage (N-Channel) VBRDSS 30 V VGS = 0, ID = 250μA 3
Gate-Source Threshold Voltage (N-Channel) VGS(th) 1 3 V VDS =VGS , ID = 250μA 3
Gate-Body Leakage Current (N-Channel) IGSS -10 10 µA VDS =0V, VGS =±16V 3
Zero Gate Voltage Drain Current (N-Channel) IDSS 1 µA VDS = 30 V, VGS = 0 V 3
Drain-Source On-Resistance (N-Channel) RDS(ON) 26 34 mΩ VGS = 10 V, ID = 6 A 3
Drain-Source On-Resistance (N-Channel) RDS(ON) 36 52 mΩ VGS = 4.5 V, ID = 5 A 3
Diode Forward Voltage (N-Channel) VSD 0.8 1.2 V IS = 1.7 A, VGS = 0 V 3

CAD (KiCad official)

  • Symbol: LNP4606T1G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lnp4606t1g-etched.step / lnp4606t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lnp4606t1g.step / lnp4606t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 28eecaf04ff227de, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF