main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers lmp7712mme: viewers · Ray 4d ago
lmp7712mme-etched.glb Publish 0.1.0 · Ray 4d ago
lmp7712mme-etched.step lmp7712mme: factory component page (tier=mfr) · Ray 4d ago
lmp7712mme-hero.glb lmp7712mme: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
lmp7712mme-hero.overlay.json Publish 0.1.0 · Ray 4d ago
lmp7712mme.glb Publish 0.1.0 · Ray 4d ago
lmp7712mme.kicad_mod Publish 0.1.0 · Ray 4d ago
lmp7712mme.kicad_sym Publish 0.1.0 · Ray 4d ago
lmp7712mme.lbr Publish 0.1.0 · Ray 4d ago
lmp7712mme.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago

LMP7712MME

Texas Instruments · Operational Amplifier · VSSOP-10-0.5mm

LMP7712MME from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Channel A rail-to-rail output.
2 -IN A input Channel A inverting input.
3 +IN A input Channel A non-inverting input.
4 V- power_in Negative supply (ground in single-supply use); supply range is 1.8V to 5.5V total.
5 EN A input Channel A enable; enabled at VEN of 4.6V or higher and shutdown at VEN of 0.4V or lower (5V supply).
6 EN B input Channel B enable; enabled at VEN of 4.6V or higher and shutdown at VEN of 0.4V or lower (5V supply).
7 +IN B input Channel B non-inverting input.
8 -IN B input Channel B inverting input.
9 OUT B output Channel B rail-to-rail output.
10 V+ power_in Positive supply; supply range is 1.8V to 5.5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-10-0.5mm
Category Operational Amplifier/Comparator
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (2.5V) VOS -180 20 180 µV V+=2.5V, TA=25°C; typ printed ±20 3
Input Offset Voltage (2.5V, temp extremes) VOS -480 480 µV V+=2.5V, temperature extremes 3
Input Bias Current (2.5V) IB 0.05 1 pA VCM=1.0V, TA=25°C 3
Input Bias Current (2.5V, to 125°C) IB 0.05 100 pA VCM=1.0V, -40°C ≤ TA ≤ 125°C 3
Input Offset Current (2.5V) IOS 0.006 0.5 pA VCM=1.0V; 50 at temp extremes 3
Common Mode Rejection Ratio (2.5V) CMRR 83 100 dB 0V ≤ VCM ≤ 1.4V; 80 at temp extremes 3
Power Supply Rejection Ratio (2.5V table) PSRR 85 100 dB 2.0V ≤ V+ ≤ 5.5V, V-=0V, VCM=0; 80 at temp extremes 3
Common Mode Voltage Range (2.5V) CMVR -0.3 1.5 V CMRR ≥ 80 dB 3
Open Loop Voltage Gain LMP7712 (2.5V, 2k) AVOL 84 92 dB VO=0.15 to 2.2V, RL=2 kΩ to V+/2; 80 at extremes 3
Open Loop Voltage Gain LMP7712 (2.5V, 10k) AVOL 90 95 dB VO=0.15 to 2.2V, RL=10 kΩ to V+/2; 86 at extremes 3
Output Swing High (2.5V, 2k) VOUT 25 70 mV RL=2 kΩ to V+/2, from either rail; 77 at extremes 3
Output Swing High (2.5V, 10k) VOUT 20 60 mV RL=10 kΩ to V+/2, from either rail; 66 at extremes 3
Output Swing Low (2.5V, 2k) VOUT 30 70 mV RL=2 kΩ to V+/2, from either rail; 73 at extremes 3
Output Swing Low (2.5V, 10k) VOUT 15 60 mV RL=10 kΩ to V+/2, from either rail; 62 at extremes 3
Output Current Sourcing (2.5V) IOUT 36 52 mA Sourcing to V-, VIN=200 mV; 30 at extremes 3
Output Current Sinking (2.5V) IOUT 7.5 15 mA Sinking to V+, VIN=-200 mV; 5.0 at extremes 3
Supply Current LMP7712 per channel (2.5V) IS 1.1 1.5 mA Enable mode, VEN ≥ 2.1; 1.85 at extremes 3
Shutdown Supply Current per channel (2.5V) IS 0.03 1 µA VEN ≤ 0.4; 4 at extremes 3
Enable Pin Voltage, Enable Mode (2.5V) VEN 2.1 V Enable Mode; typ range 2 - 2.5 4
Enable Pin Voltage, Shutdown Mode (2.5V) VEN 0.4 V Shutdown Mode; typ range 0 - 0.5 4
Enable Pin Input Current (2.5V) IEN 1.5 3 µA VEN=2.5V 4
Input Offset Voltage (5V) VOS -150 10 150 µV V+=5V, TA=25°C; typ printed ±10 4
Input Offset Voltage (5V, temp extremes) VOS -450 450 µV V+=5V, temperature extremes 4
Input Bias Current (5V) IB 0.1 1 pA VCM=2.0V, TA=25°C 4
Input Bias Current (5V, to 125°C) IB 0.1 100 pA VCM=2.0V, -40°C ≤ TA ≤ 125°C 4
Input Offset Current (5V) IOS 0.01 0.5 pA VCM=2.0V; 50 at temp extremes 4
Common Mode Rejection Ratio (5V) CMRR 85 100 dB 0V ≤ VCM ≤ 3.7V; 82 at temp extremes 4
Power Supply Rejection Ratio (5V table) PSRR 85 100 dB 2.0V ≤ V+ ≤ 5.5V, V-=0V, VCM=0; 80 at temp extremes 4
Common Mode Voltage Range (5V) CMVR -0.3 4 V CMRR ≥ 80 dB 4
Open Loop Voltage Gain LMP7712 (5V, 2k) AVOL 84 90 dB VO=0.3 to 4.7V, RL=2 kΩ to V+/2; 80 at extremes 5
Open Loop Voltage Gain LMP7712 (5V, 10k) AVOL 90 95 dB VO=0.3 to 4.7V, RL=10 kΩ to V+/2; 86 at extremes 5
Output Swing High (5V, 2k) VOUT 32 70 mV RL=2 kΩ to V+/2, from either rail; 77 at extremes 5
Output Swing High (5V, 10k) VOUT 22 60 mV RL=10 kΩ to V+/2, from either rail; 66 at extremes 5
Output Swing Low LMP7712 (5V, 2k) VOUT 50 75 mV RL=2 kΩ to V+/2, from either rail; 78 at extremes 5
Output Swing Low (5V, 10k) VOUT 20 60 mV RL=10 kΩ to V+/2, from either rail; 62 at extremes 5
Output Current Sourcing (5V) IOUT 46 66 mA Sourcing to V-, VIN=200 mV; 38 at extremes 5
Output Current Sinking (5V) IOUT 10.5 23 mA Sinking to V+, VIN=-200 mV; 6.5 at extremes 5
Supply Current LMP7712 per channel (5V) IS 1.3 1.7 mA Enable mode, VEN ≥ 4.6; 2.05 at extremes 5
Shutdown Supply Current per channel (5V) IS 0.14 1 µA VEN ≤ 0.4; 4 at extremes 5
Slew Rate Rising (5V) SR 6 9.5 V/µs AV=+1, Rising (10% to 90%) 5
Slew Rate Falling (5V) SR 7.5 11.5 V/µs AV=+1, Falling (90% to 10%) 5
Enable Pin Voltage, Enable Mode (5V) VEN 4.6 V Enable Mode; typ range 4.5, 5 5
Enable Pin Voltage, Shutdown Mode (5V) VEN 0.4 V Shutdown Mode; typ range 0, 0.5 5
Enable Pin Input Current (5V) IEN 5.6 10 µA VEN=5V 5
ESD Human Body Model 2000 V 2
ESD Machine Model 200 V 2
ESD Charge-Device Model 1000 V 2
Differential Input Voltage VIN -0.3 0.3 V 2
Supply Voltage VS 6 V VS = V+, V- 2
Storage Temperature Range -65 150 °C 2
Junction Temperature TJ 150 °C 2
Operating Temperature Range -40 125 °C 2
Supply Voltage (0°C to 125°C) VS 1.8 5.5 V 0°C ≤ TA ≤ 125°C 2
Supply Voltage (-40°C to 125°C) VS 2 5.5 V -40°C ≤ TA ≤ 125°C 2
Package Thermal Resistance, 10-Pin VSSOP θJA 236 °C/W 10-Pin VSSOP 2

CAD (KiCad official)

  • Symbol: LMP7712MME
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
  • 3D model files: lmp7712mme-etched.step / lmp7712mme-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmp7712mme.step / lmp7712mme.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 67c3b6cade0fa216, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF