component
LMK1D1204RGTT
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "lmk1d1204rgtt",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Clock Buffers, Drivers, Distributors, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"clock-timing",
"lmk1d1204rgtt",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"lmk1d1204rgtt.glb",
"lmk1d1204rgtt.step",
"lmk1d1204rgtt.lbr",
"docs/hero.png",
"docs/lmk1d1204rgtt-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"lmk1d1204rgtt-hero.glb",
"lmk1d1204rgtt-hero.overlay.json",
"lmk1d1204rgtt-etched.glb"
],
"component": {
"mpn": "LMK1D1204RGTT",
"manufacturer": "Texas Instruments",
"package": "VQFN-16-EP(3x3)",
"pin_count": 17,
"category": "Clock/Timing",
"subcategory": "Clock Buffers, Drivers, Distributors",
"datasheet": "https://www.ti.com/cn/lit/gpn/lmk1d1204",
"parts": {
"symbol": "lmk1d1204rgtt.kicad_sym",
"footprint": "lmk1d1204rgtt.kicad_mod",
"model_3d": "lmk1d1204rgtt-hero.glb",
"model_3d_plain": "lmk1d1204rgtt-etched.glb",
"model_3d_step": "lmk1d1204rgtt-etched.step",
"model_3d_step_plain": "lmk1d1204rgtt.step",
"lbr": "lmk1d1204rgtt.lbr"
},
"distributor_links": {
"lcsc": "C3613594",
"digikey": "296-LMK1D1204RGTTTR-ND",
"mouser": "595-LMK1D1204RGTT"
},
"distributor_check": {
"checked_at": "2026-10-20T18:29:16Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-LMK1D1204RGTTTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-LMK1D1204RGTT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground connection for the device; the exposed die attach pad must also be connected to the PCB ground plane for heat dissipation."
},
{
"number": "2",
"name": "IN_SEL",
"type": "input",
"description": "Input select: logic 0 selects IN0, logic 1 selects IN1, and an open pin disables the outputs (static logic low), with an internal 500 kΩ pull-up and 320 kΩ pull-down."
},
{
"number": "3",
"name": "IN1_P",
"type": "input",
"description": "Secondary clock input, positive side of a differential pair or single-ended input."
},
{
"number": "4",
"name": "IN1_N",
"type": "input",
"description": "Secondary clock input, negative side of a differential pair or single-ended input; when driven single-ended, the unused negative input must be biased as shown in Figure 8-6."
},
{
"number": "5",
"name": "VDD",
"type": "power_in",
"description": "Device supply voltage of 1.8 V, 2.5 V or 3.3 V (1.71-1.89 V, 2.375-2.625 V or 3.135-3.465 V), with a monotonic ramp of 0.1 to 20 ms (10-90% of VDD)."
},
{
"number": "6",
"name": "IN0_P",
"type": "input",
"description": "Primary clock input, positive side of a differential pair or single-ended input."
},
{
"number": "7",
"name": "IN0_N",
"type": "input",
"description": "Primary clock input, negative side of a differential pair or single-ended input; when driven single-ended, the unused negative input must be biased as shown in Figure 8-6."
},
{
"number": "8",
"name": "VAC_REF0",
"type": "output",
"description": "Bias voltage output for capacitively coupled inputs; if used, TI recommends a 0.1 µF capacitor from this pin to GND."
},
{
"number": "9",
"name": "OUT0_P",
"type": "output",
"description": "Positive side of LVDS differential clock output pair 0."
},
{
"number": "10",
"name": "OUT0_N",
"type": "output",
"description": "Negative side of LVDS differential clock output pair 0."
},
{
"number": "11",
"name": "OUT1_P",
"type": "output",
"description": "Positive side of LVDS differential clock output pair 1."
},
{
"number": "12",
"name": "OUT1_N",
"type": "output",
"description": "Negative side of LVDS differential clock output pair 1."
},
{
"number": "13",
"name": "OUT2_P",
"type": "output",
"description": "Positive side of LVDS differential clock output pair 2."
},
{
"number": "14",
"name": "OUT2_N",
"type": "output",
"description": "Negative side of LVDS differential clock output pair 2."
},
{
"number": "15",
"name": "OUT3_P",
"type": "output",
"description": "Positive side of LVDS differential clock output pair 3."
},
{
"number": "16",
"name": "OUT3_N",
"type": "output",
"description": "Negative side of LVDS differential clock output pair 3."
},
{
"number": "17",
"name": "DAP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed die attach pad (thermal pad, GND) is listed in Table 5-1 and the package drawing but has; Pin descriptions are translated from the Chinese datasheet (TI notes the translation may not be exac",
"exposed pad 17 added from the footprint"
],
"pages_sent": 38,
"cost_usd": 0.1379,
"at": "2026-10-20T18:27:15"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lmk1d1204",
"pages": 38,
"sha256": "d94c1191598792aa",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 17,
"described": 17,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
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"role": "plain",
"up": "Z",
"units": "mm",
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"seat": "z = 0",
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"checked": "2026-10-20",
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{
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}
}