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LMK1D1204RGTT
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMK1D1204RGTT
Texas Instruments · Clock Buffers, Drivers, Distributors · VQFN-16-EP(3x3)
LMK1D1204RGTT from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection for the device; the exposed die attach pad must also be connected to the PCB ground plane for heat dissipation. |
| 2 | IN_SEL | input | Input select: logic 0 selects IN0, logic 1 selects IN1, and an open pin disables the outputs (static logic low), with an internal 500 kΩ pull-up and 320 kΩ pull-down. |
| 3 | IN1_P | input | Secondary clock input, positive side of a differential pair or single-ended input. |
| 4 | IN1_N | input | Secondary clock input, negative side of a differential pair or single-ended input; when driven single-ended, the unused negative input must be biased as shown in Figure 8-6. |
| 5 | VDD | power_in | Device supply voltage of 1.8 V, 2.5 V or 3.3 V (1.71-1.89 V, 2.375-2.625 V or 3.135-3.465 V), with a monotonic ramp of 0.1 to 20 ms (10-90% of VDD). |
| 6 | IN0_P | input | Primary clock input, positive side of a differential pair or single-ended input. |
| 7 | IN0_N | input | Primary clock input, negative side of a differential pair or single-ended input; when driven single-ended, the unused negative input must be biased as shown in Figure 8-6. |
| 8 | VAC_REF0 | output | Bias voltage output for capacitively coupled inputs; if used, TI recommends a 0.1 µF capacitor from this pin to GND. |
| 9 | OUT0_P | output | Positive side of LVDS differential clock output pair 0. |
| 10 | OUT0_N | output | Negative side of LVDS differential clock output pair 0. |
| 11 | OUT1_P | output | Positive side of LVDS differential clock output pair 1. |
| 12 | OUT1_N | output | Negative side of LVDS differential clock output pair 1. |
| 13 | OUT2_P | output | Positive side of LVDS differential clock output pair 2. |
| 14 | OUT2_N | output | Negative side of LVDS differential clock output pair 2. |
| 15 | OUT3_P | output | Positive side of LVDS differential clock output pair 3. |
| 16 | OUT3_N | output | Negative side of LVDS differential clock output pair 3. |
| 17 | DAP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16-EP(3x3) |
| Category | Clock/Timing |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Core supply voltage (3.3 V supply) | VDD | 3.135 | 3.3 | 3.465 | V | 8 | |
| Core supply voltage (2.5 V supply) | VDD | 2.375 | 2.5 | 2.625 | V | 8 | |
| Core supply voltage (1.8 V supply) | VDD | 1.71 | 1.8 | 1.89 | V | 8 | |
| Supply ramp time | 0.1 | 20 | ms | 需要单调斜坡（VDD 的 10-90%） | 8 | ||
| Operating free-air temperature | TA | -40 | 105 | °C | 自然通风 | 8 | |
| Operating junction temperature | TJ | -40 | 135 | °C | 8 | ||
| Supply voltage | VDD | -0.3 | 3.6 | V | 8 | ||
| Input voltage | VIN | -0.3 | 3.6 | V | 8 | ||
| Output voltage | VO | -0.3 | V | 8 | |||
| Input current | IIN | -20 | 20 | mA | 8 | ||
| Continuous output current | IO | -50 | 50 | mA | 8 | ||
| Junction temperature | TJ | 135 | °C | 8 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 器件未通电 | 8 | |
| Junction-to-ambient thermal resistance (VQFN 16) | RθJA | 48.7 | °C/W | 9 | |||
| Junction-to-case (top) thermal resistance (VQFN 16) | RθJC(top) | 56.4 | °C/W | 9 | |||
| Junction-to-board thermal resistance (VQFN 16) | RθJB | 23.6 | °C/W | 9 | |||
| Junction-to-top characterization parameter (VQFN 16) | ΨJT | 1.6 | °C/W | 9 | |||
| Junction-to-board characterization parameter (VQFN 16) | ΨJB | 23.6 | °C/W | 9 | |||
| Junction-to-case (bottom) thermal resistance (VQFN 16) | RθJC(bot) | 8.6 | °C/W | 9 | |||
| Supply current, static | IDDSTAT | 50 | mA | 所有输出均已启用且未端接，f = 0Hz | 9 | ||
| Supply current at 100 MHz | IDD100M | 60 | 72 | mA | 所有输出均已启用，RL = 100Ω，f = 100MHz | 9 | |
| Input low voltage | VIL | -0.3 | V | 逻辑“0”状态的最大输入电压 | 9 | ||
| Input high current | IIH | 30 | µA | VDD 可以是 1.8V/2.5V/3.3V，VIH = VDD | 9 | ||
| Input low current | IIL | -30 | µA | VDD 可以是 1.8V/2.5V/3.3V，VIH = VDD | 9 | ||
| Single-ended input voltage swing | VIN_S-E | 0.4 | 3.465 | V | 假设方波输入具有两个电平 | 9 | |
| Input slew rate (20% to 80%) | dVIN/dt | 0.05 | V/ns | 输入压摆率（振幅的 20% 至 80%） | 9 | ||
| Single-ended input high current | IIH | 50 | µA | VDD = 3.465V，VIH = 3.465V | 9 | ||
| Single-ended input low current | IIL | -30 | µA | VDD = 3.465V，VIL = 0V | 9 | ||
| Single-ended clock input frequency | fIN | 250 | MHz | 时钟输入 DC | 9 | ||
| Differential clock input frequency | fIN | 2 | GHz | 时钟输入 | 9 | ||
| Differential input voltage peak-to-peak | VIN,DIFF(p-p) | 0.3 | 2.4 | V | VICM = 1V (VDD = 1.8V) | 9 | |
| Input common-mode voltage | VICM | 0.25 | 2.3 | V | VIN,DIFF(P-P) > 0.4V (VDD = 1.8V/2.5/3.3V) | 9 | |
| Differential input high current | IIH | 30 | µA | VDD = 3.465V，VINP = 2.4V，VINN = 1.2V | 10 | ||
| Differential input low current | IIL | -30 | µA | VDD = 3.465V，VINP = 0V，VINN = 1.2V | 10 | ||
| Differential output voltage amplitude (AMP_SEL = 0) | /VOD/ | 250 | 350 | 450 | mV | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω，AMP_SEL = 0 | 10 |
| Differential output voltage amplitude | /VOD/ | 250 | 350 | 450 | mV | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω | 10 |
| Differential output voltage change (AMP_SEL = 0) | ΔVOD | -15 | 15 | mV | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω，AMP_SEL = 0 | 10 | |
| Differential output voltage change | ΔVOD | -15 | 15 | mV | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω | 10 | |
| Steady-state common-mode output voltage (VDD = 1.8V) | VOC(SS) | 1 | 1.2 | V | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω (VDD = 1.8V) | 10 | |
| Steady-state common-mode output voltage (VDD = 2.5V/3.3V) | VOC(SS) | 1.1 | 1.375 | V | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω (VDD = 2.5V/3.3V) | 10 | |
| Steady-state common-mode output voltage change | ΔVOC(SS) | -15 | 15 | mV | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω | 10 | |
| Output overshoot and undershoot | Vring | -0.1 | 0.1 | VOD | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω，fOUT = 491.52MHz | 10 | |
| Output AC common-mode voltage | VOS | 50 | 100 | mVpp | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω | 10 | |
| Short-circuit output current (differential) | IOS | -12 | 12 | mA | VOUTP = VOUTN | 10 | |
| Short-circuit output current (common-mode) | IOS(cm) | -24 | 24 | mA | VOUTP = VOUTN = 0 | 10 | |
| Propagation delay | tPD | 0.3 | 0.575 | ns | VIN,DIFF(P-P) = 0.3V，RLOAD = 100Ω (1) | 10 | |
| Device-to-device delay | tSK,PP | 250 | ps | 输入和输出负载相同的情况下，不同器件在相同工作条件下的输出之间的偏移 | 10 | ||
| Pulse skew | tSK,P | -20 | 20 | ps | 50% 占空比输入，交叉点到交叉点失真 (2) | 10 | |
| Random additional jitter (rms) | tRJIT(ADD) | 50 | 60 | fs RMS | fIN = 156.25MHz，占空比 50%，输入压摆率 = 1.5V/ns，积分范围 = 12kHz - 20MHz，输出负载 RLOAD = 100Ω | 10 | |
| Multiplexer isolation | MUXISO | 80 | dB | fIN = 156.25MHz | 12 | ||
| Output duty cycle | ODC | 45 | 55 | % | 输入占空比为 50% | 12 | |
| Output rise and fall time (20% to 80%) | tR/tF | 300 | ps | 20% 至 80%，RLOAD = 100Ω | 12 | ||
| Reference output voltage (VAC_REF) | VAC_REF | 0.9 | 1.25 | 1.375 | V | VDD = 2.5V，ILOAD = 100µA | 12 |
CAD (KiCad official)
- Symbol:
LMK1D1204RGTT - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
lmk1d1204rgtt-etched.step/lmk1d1204rgtt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmk1d1204rgtt.step/lmk1d1204rgtt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
d94c1191598792aa, retrieved 2026-10-20, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).