component
LMK00804BQWRGTTQ1
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "lmk00804bqwrgttq1",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Clock Buffers, Drivers, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"rtc-clock chip",
"lmk00804bqwrgttq1",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"path": "docs/hero.png"
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"component": {
"mpn": "LMK00804BQWRGTTQ1",
"manufacturer": "Texas Instruments",
"package": "VQFN-16-EP(3x3)",
"pin_count": 17,
"category": "RTC/Clock Chip",
"subcategory": "Clock Buffers, Drivers",
"datasheet": "https://www.ti.com/cn/lit/gpn/lmk00804b-q1",
"parts": {
"symbol": "lmk00804bqwrgttq1.kicad_sym",
"footprint": "lmk00804bqwrgttq1.kicad_mod",
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"model_3d_step_plain": "lmk00804bqwrgttq1.step",
"lbr": "lmk00804bqwrgttq1.lbr"
},
"distributor_links": {
"lcsc": "C1520152",
"digikey": "296-LMK00804BQWRGTTQ1TR-ND",
"mouser": "595-MK00804BQWRGTTQ1"
},
"distributor_check": {
"checked_at": "2026-10-08T00:40:16Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-LMK00804BQWRGTTQ1TR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-MK00804BQWRGTTQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Power supply ground."
},
{
"number": "2",
"name": "NC",
"type": "unconnected",
"description": "No-connect pin, typically left floating and not to be connected to GND."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply terminal, typically 3.3 V (recommended 3.135 V to 3.465 V), with a typical 0.1 µF decoupling capacitor to GND."
},
{
"number": "4",
"name": "CLK_EN",
"type": "input",
"description": "Synchronous clock enable input that must be held low until a valid reference clock is provided; low forces outputs to logic low and high enables the LVCMOS/LVTTL outputs, with an internal pullup (typically 1 kΩ to VDD external) and left floating when unused."
},
{
"number": "5",
"name": "CLK_P",
"type": "input",
"description": "Noninverting differential clock input with internal 51 kΩ (typ) pulldown to GND, which can also accept a single-ended clock; leave floating when unused."
},
{
"number": "6",
"name": "CLK_N",
"type": "input",
"description": "Inverting differential clock input with internal 51 kΩ (typ) pullup to VDD and 51 kΩ (typ) pulldown to GND, internally biased to VDD/2 when floating."
},
{
"number": "7",
"name": "CLK_SEL",
"type": "input",
"description": "Clock select input, typically pulled up to VDD with an external 1 kΩ; low selects LVCMOS_CLK (pin 8) and high selects CLK_P/CLK_N (pins 5, 6)."
},
{
"number": "8",
"name": "LVCMOS_CLK",
"type": "input",
"description": "Single-ended clock input with internal 51 kΩ (typ) pulldown to GND that accepts LVCMOS/LVTTL levels; leave floating when unused."
},
{
"number": "9",
"name": "GND",
"type": "power_in",
"description": "Power supply ground."
},
{
"number": "10",
"name": "Q3",
"type": "output",
"description": "Single-ended clock output with LVCMOS/LVTTL levels at 7 Ω output impedance, typically driven into a 43 Ω series termination; leave unconnected when unused."
},
{
"number": "11",
"name": "VDDO",
"type": "power_in",
"description": "Output supply terminal, typically 3.3 V, 2.5 V, 1.8 V or 1.5 V, with a typical 0.1 µF decoupling capacitor to GND."
},
{
"number": "12",
"name": "Q2",
"type": "output",
"description": "Single-ended clock output with LVCMOS/LVTTL levels at 7 Ω output impedance, typically driven into a 43 Ω series termination; leave unconnected when unused."
},
{
"number": "13",
"name": "GND",
"type": "power_in",
"description": "Power supply ground."
},
{
"number": "14",
"name": "Q1",
"type": "output",
"description": "Single-ended clock output with LVCMOS/LVTTL levels at 7 Ω output impedance, typically driven into a 43 Ω series termination; leave unconnected when unused."
},
{
"number": "15",
"name": "VDDO",
"type": "power_in",
"description": "Output supply terminal, typically 3.3 V, 2.5 V, 1.8 V or 1.5 V, with a typical 0.1 µF decoupling capacitor to GND."
},
{
"number": "16",
"name": "Q0",
"type": "output",
"description": "Single-ended clock output with LVCMOS/LVTTL levels at 7 Ω output impedance, typically driven into a 43 Ω series termination; leave unconnected when unused."
},
{
"number": "17",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The thermal pad on the RGT VQFN package is shown in the top-view drawing but is not given a pin numb; Pin types were mapped to KiCad ERC classes: VDD and VDDO are supply inputs and were set to power_in,",
"exposed pad 17 added from the footprint"
],
"pages_sent": 9,
"cost_usd": 0.0634,
"at": "2026-10-08T00:40:00"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lmk00804b-q1",
"pages": 29,
"sha256": "b58ecb79387c6fb9",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 17,
"described": 17,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"seat": "z = 0",
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3.0,
3.0,
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"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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}