component
LM63625DQPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLM63625DQPWPRQ1
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
LM63625DQPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | power_out | Regulator switching node; connect to power inductor; supports voltage swing -6V to +40V transient with rise/fall times <10ns. |
| 2 | SW | power_out | Regulator switching node duplicate connection; connect to power inductor; voltage range -6V to +40V transient. |
| 3 | CBOOT | power_in | Bootstrap supply voltage for internal high-side MOSFET gate driver; connect 220nF quality ceramic capacitor between CBOOT and SW pin; UVLO threshold 2.13V. |
| 4 | VCC | power_out | Internal 5V LDO regulated output for control circuit supply; connect 1µF quality capacitor to PGND; output voltage 4.75V to 5.25V nominal; do not connect external loads. |
| 5 | RT | input | Frequency programming input; connect to VCC for 400kHz, connect to AGND for 2.1MHz, or connect to external resistor for adjustable 250kHz to 2200kHz switching frequency; cannot be left floating. |
| 6 | VSEL | input | Output voltage selection input; connect to VCC for 5V fixed output, connect to AGND for 3.3V fixed output, or connect 10kΩ resistor to AGND for adjustable output 1V to 20V; cannot be left floating. |
| 7 | SYNC/MODE | input | Mode selection and external synchronization clock input; connect to VCC for forced PWM mode, connect to AGND for automatic PFM/PWM mode, or apply external clock 250kHz to 2200kHz for synchronized operation; includes 100kΩ internal pull-down. |
| 8 | RESET | output | Open-drain power good flag output; pulled low when output voltage exceeds ±12% deviation, during soft-start, upon internal fault, or when EN input is low; connect through 10kΩ to 100kΩ current-limiting resistor to logic supply. |
| 9 | FB | input | Feedback input to output voltage regulation loop; regulated to 1.0V internal reference in adjustable mode, 5.0V in 5V fixed mode, or 3.3V in 3.3V fixed mode; input bias current 0.1µA to 3.4µA depending on mode. |
| 10 | AGND | power_in | Analog ground reference for control circuits; provides common reference point for all internal biasing, feedback measurement, and electrical parameter specifications; connect to PCB system ground. |
| 11 | EN | input | Precision enable input to regulator; voltage ≥1.425V enables soft-start and regulation, voltage ≤0.94V disables converter; cannot be left floating; can be directly connected to VIN or through external divider for custom UVLO threshold. |
| 12 | VIN | power_in | Input power supply rail; accepts 3.5V to 36V input voltage; bypass with 4.7µF quality ceramic capacitor and 220nF capacitor placed within 1mm of VIN and PGND pins; quiescent input current 23µA typical. |
| 13 | VIN | power_in | Input power supply rail duplicate connection; bypass with quality ceramic capacitor; same voltage range 3.5V to 36V and bypass requirements as pin 12. |
| 14 | NC | unconnected | No connection; no internal circuit connection to this pin; leave unconnected; do not apply external voltage. |
| 15 | PGND | power_in | Power ground terminal; source connection for low-side MOSFET switch; connect to system ground and input/output capacitor grounds using short wide traces to minimize loop inductance. |
| 16 | PGND | power_in | Power ground terminal duplicate connection; parallel ground connection for low-impedance distribution of switching stage currents to ground plane. |
| 17 | DAP | power_in | Exposed thermal pad for heatsink and electrical ground connection; provides primary thermal dissipation path and electrical ground; solder directly to PCB ground layer using thermal via matrix for optimal thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LM63625DQPWPRQ1 - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
lm63625dqpwprq1-etched.step/lm63625dqpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm63625dqpwprq1.step/lm63625dqpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (58 pp, sha256
3be5c04a49a998ff, retrieved 2026-09-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).