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LM53601NQDSXRQ1

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM53601NQDSXRQ1

Texas Instruments · DC-DC Converters · WSON-10-EP(3x3)

LM53601NQDSXRQ1 from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Regulator switch node, connected to the output inductor.
2 BOOT input High-side gate driver upper supply rail; connect a 100-nF capacitor from SW to BOOT, charged by an internal diode while SW is low. Absolute maximum BOOT to SW is 3.6 V.
3 VCC power_out Internal 3-V regulator output supplying the internal control circuits; connect a high-quality 1.0-µF capacitor from this pin to AGND for the fixed version.
4 FB input Fixed version only: feedback for the output voltage and power source for the VCC regulator, connected to the output node with a 10-nF bypass capacitor placed immediately adjacent to the pin; FB to GND absolute maximum is 16 V for the 3.3-V and 5-V versions.
5 AGND power_in Fixed version only: ground to which the input signals and FB are compared; GND to AGND is limited to ±0.3 V DC (1 µs or less for up to −1 V to 2 V).
6 RESET output Open-drain reset output that requires a current-limiting pull-up resistor to a suitable supply; high means regulator OK and low means regulator fault, and it goes low when EN is low; RESET to GND absolute maximum is 8 V and sink current is limited to 8 mA.
7 EN input Enable input: high turns the regulator on and low turns it off; it can be connected to VIN but must not be left floating (EN to GND absolute maximum is 42 V).
8 VIN power_in Input supply to the regulator; input bypass capacitors connect directly between this pin and GND (VIN to GND absolute maximum is 42 V, recommended input range 3.8 V to 36 V after startup).
9 SYNC/MODE input Multifunction mode control tolerant of voltages up to VIN: a valid external clock forces PWM and synchronizes the switching on its rising edge, tied high gives forced PWM at the internal clock, and tied low gives AUTO mode with diode emulation at light load; it must not be left floating.
10 GND power_in Power ground, bypassed to VIN immediately adjacent to this pin.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-10-EP(3x3)
Category Power Management (PMIC)
Pins 11

CAD (KiCad official)

  • Symbol: LM53601NQDSXRQ1
  • Footprint: Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm
  • 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: lm53601nqdsxrq1-etched.step / lm53601nqdsxrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm53601nqdsxrq1.step / lm53601nqdsxrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 d174c97c59a34282, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF