component

LM51561QDSSRQ1

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Texas Instruments DC-DC Converters, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM51561QDSSRQ1

Texas Instruments · DC-DC Converters · WSON-12-EP(2x3)

LM51561QDSSRQ1 from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BIAS power_in Supply voltage input to internal VCC regulator; supports 2.97V to 60V operating range with 65V absolute maximum for automotive load dump transients.
2 VCC power_in Regulated output voltage from internal VCC regulator and supply input for MOSFET gate driver; 6.85V typical with absolute maximum 18V or VBIAS+0.3V.
3 GATE output N-channel MOSFET gate drive output capable of sourcing and sinking 1.5A peak current with output swing from 0.15V low state to VCC minus 0.25V high state.
4 GND power_in Ground return pin; connect directly to sense resistor ground through low-inductance wide and short path and to ground copper plane.
5 CS input Low-side current sense input; 100mV±7% peak current limit threshold with 0.3V DC and -1V for 50ns transient absolute maximum ratings.
6 COMP output Transconductance error amplifier output with 10MΩ output impedance and internal voltage clamps at 2.5-2.8V rising and 1-1.1V falling.
7 DITHOFF input Spread spectrum dithering selection input; internal dithering enabled when voltage is less than 1.0V or connected to GND, disabled when greater than 2.0V or connected to VCC.
8 FB input Inverting input of internal error amplifier; 1V±1% internal reference with 4.0V absolute maximum rating.
9 SS input Soft-start capacitor programming pin; charged by 10µA internal current source to ramp error amplifier reference during power-on soft start sequence.
10 RT input Switching frequency programming pin; regulated to 0.5V by internal regulator with programmable frequency range from 100kHz to 2.2MHz.
11 PGOOD output Power-good indicator open-drain output; pulls low when FB falls below undervoltage threshold with 18V absolute maximum and 1mA maximum sink capability.
12 UVLO/SYNC/EN input Undervoltage lockout and external clock synchronization input; 1.5V typical rising threshold and 1.45V typical falling threshold with 50mV hysteresis.
13 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-12-EP(2x3)
Category Power Management (PMIC)
Pins 13

CAD (KiCad official)

  • Symbol: LM51561QDSSRQ1
  • Footprint: Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65
  • 3D model: WSON-12-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lm51561qdssrq1-etched.step / lm51561qdssrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm51561qdssrq1.step / lm51561qdssrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 2f02152f7d3a5e51, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF