component

LM51551QDSSRQ1

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM51551QDSSRQ1

Texas Instruments · DC-DC Converters · WSON-12-EP(2x3)

LM51551QDSSRQ1 from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BIAS power_in Power supply input to VCC regulator operating from 2.97V to 45V with bypass capacitor to PGND.
2 VCC power_out Regulated power output from internal VCC regulator at 6.5V to 7V nominal supplying MOSFET driver with ceramic bypass capacitor to PGND.
3 GATE output N-channel MOSFET gate driver output with 1.5A peak current capability connected via short low-inductance path to MOSFET gate.
4 PGND power_in Power ground reference connected via wide short low-inductance path to current sense resistor ground.
5 CS input Current sense input for peak current mode control connected via short path to positive side of current sense resistor with 100mV threshold.
6 COMP output Transconductance error amplifier output with 10MΩ impedance and 7MHz bandwidth with loop compensation network connected between this pin and PGND.
7 AGND power_in Analog ground reference with wide short path connection required to analog ground plane.
8 FB input Error amplifier feedback input with 1V ±1% reference, voltage divider from output connected to set target output voltage in boost/SEPIC topologies.
9 SS input Soft-start programming pin with external capacitor and 10μA internal current source for setting startup ramp rate, capacitor ground to AGND.
10 RT input Switch frequency programming pin regulated to 0.5V, single external resistor to AGND programs switching frequency from 100kHz to 2.2MHz.
11 PGOOD output Open-drain power good indicator output goes low if feedback drops below 90% of 1V reference with 25μs glitch filter and pull-up resistor to system voltage.
12 UVLO/SYNC input UVLO threshold programming and enable/sync control pin from 0V to VBIAS+0.3V via resistor divider, supports external clock synchronization via negative pulse, do not leave floating.
13 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-12-EP(2x3)
Category Power Management (PMIC)
Pins 13

CAD (KiCad official)

  • Symbol: LM51551QDSSRQ1
  • Footprint: Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65
  • 3D model: WSON-12-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lm51551qdssrq1-etched.step / lm51551qdssrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm51551qdssrq1.step / lm51551qdssrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 a8503f9fa4bec785, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF