LM5119PSQE

{
  "schema_version": 1,
  "type": "component",
  "slug": "lm5119psqe",
  "title": "LM5119PSQE",
  "brief": "Texas Instruments DC-DC Converters, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "lm5119psqe",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "LM5119PSQE",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-32-EP(5x5)",
    "pin_count": 33,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/lm5119",
    "parts": {
      "symbol": "lm5119psqe.kicad_sym",
      "footprint": "lm5119psqe.kicad_mod",
      "model_3d": "lm5119psqe-hero.glb",
      "model_3d_plain": "lm5119psqe.glb",
      "model_3d_step": "lm5119psqe-etched.step",
      "model_3d_step_plain": "lm5119psqe.step",
      "lbr": "lm5119psqe.lbr"
    },
    "distributor_links": {
      "lcsc": "C2860647"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T03:39:03Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC1",
        "type": "power_in",
        "description": "VCC bias pin for channel 1; the datasheet limits VCC to 5.5 V to 14 V recommended and -0.3 V to 15 V absolute maximum to AGND."
      },
      {
        "number": "2",
        "name": "LO1",
        "type": "output",
        "description": "Low-side MOSFET gate drive output for the channel 1 synchronous MOSFET, routed through a short, low-inductance path; LO to AGND is limited to -0.3 V to VCC + 0.3 V."
      },
      {
        "number": "3",
        "name": "PGND1",
        "type": "power_in",
        "description": "Power ground return for the channel 1 low-side gate driver, to be connected directly to the low side of the channel 1 current sense resistor."
      },
      {
        "number": "4",
        "name": "CSG1",
        "type": "input",
        "description": "Kelvin ground connection to the channel 1 external current sense resistor, to be connected directly to the resistor's low side."
      },
      {
        "number": "5",
        "name": "CS1",
        "type": "input",
        "description": "Current sense amplifier input for channel 1, connected to the high side of the channel 1 current sense resistor."
      },
      {
        "number": "6",
        "name": "RAMP1",
        "type": "input",
        "description": "PWM ramp signal for channel 1; an external resistor and capacitor between SW1, RAMP1 and AGND set the ramp slope that emulates the buck inductor current."
      },
      {
        "number": "7",
        "name": "SS1",
        "type": "input",
        "description": "Channel 1 error amplifier reference soft-start; an external capacitor with an internal 10-µA source sets the ramp rate, and the pin is held low when VCC1 or VCC2 is below 4.9 V, UVLO is below 1.25 V, or during thermal shutdown."
      },
      {
        "number": "8",
        "name": "VCCDIS",
        "type": "input",
        "description": "Optional input that disables the internal VCC regulators when pulled above 1.25 V with an external bias supplied through a diode; a 500-kΩ internal pulldown enables the regulators when floating, and VCCDIS to AGND is limited to -0.3 V to 15 V."
      },
      {
        "number": "9",
        "name": "FB1",
        "type": "input",
        "description": "Feedback and inverting input of the channel 1 error amplifier, with a regulation threshold of 0.8 V set by a resistor divider from the channel 1 output; FB1 to AGND is limited to -0.3 V to 15 V."
      },
      {
        "number": "10",
        "name": "COMP1",
        "type": "output",
        "description": "Output of the channel 1 internal error amplifier, where the loop compensation network must be connected between this pin and FB1."
      },
      {
        "number": "11",
        "name": "EN2",
        "type": "input",
        "description": "Channel 2 enable; a low level disables channel 2 while channel 1 and other functions stay active, and a 50-kΩ internal pullup enables channel 2 when the pin is floating; EN2 to AGND is limited to -0.3 V to 7 V."
      },
      {
        "number": "12",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground, the return for the internal 0.8-V voltage reference and analog circuits."
      },
      {
        "number": "13",
        "name": "RT",
        "type": "input",
        "description": "Oscillator timing pin with a single resistor to AGND; the recommended maximum oscillator frequency is 1.5 MHz, corresponding to a 750-kHz maximum switching frequency per channel, and the oscillator can be synchronized by coupling a positive pulse through a small capacitor."
      },
      {
        "number": "14",
        "name": "RES",
        "type": "output",
        "description": "Restart timer pin for an external capacitor that sets the hiccup-mode off time; hiccup begins after 256 consecutive cycle-by-cycle current-limited PWM cycles, and a 10-µA source charges the capacitor to the 1.25-V restart threshold."
      },
      {
        "number": "15",
        "name": "COMP2",
        "type": "output",
        "description": "Output of the channel 2 internal error amplifier, where the loop compensation network must be connected between this pin and FB2."
      },
      {
        "number": "16",
        "name": "FB2",
        "type": "input",
        "description": "Feedback and inverting input of the channel 2 error amplifier, with a regulation threshold of 0.8 V set by a resistor divider from the channel 2 output; FB2 to AGND is limited to -0.3 V to 15 V."
      },
      {
        "number": "17",
        "name": "DEMB",
        "type": "input",
        "description": "Diode emulation enable input, where a low level latches the low-side MOSFET off for the rest of the PWM cycle when inductor current reverses, a high level disables diode emulation, and a 50-kΩ internal pulldown enables emulation when floating; DEMB to AGND is limited to -0.3 V to 15 V."
      },
      {
        "number": "18",
        "name": "SS2",
        "type": "input",
        "description": "Channel 2 error amplifier reference soft-start; an external capacitor with an internal 10-µA source sets the ramp rate, and the pin is held low when VCC1 or VCC2 is below 4.9 V, UVLO is below 1.25 V, or during thermal shutdown."
      },
      {
        "number": "19",
        "name": "RAMP2",
        "type": "input",
        "description": "PWM ramp signal for channel 2; an external resistor and capacitor between SW2, RAMP2 and AGND set the ramp slope that emulates the buck inductor current."
      },
      {
        "number": "20",
        "name": "CS2",
        "type": "input",
        "description": "Current sense amplifier input for channel 2, connected to the high side of the channel 2 current sense resistor."
      },
      {
        "number": "21",
        "name": "CSG2",
        "type": "input",
        "description": "Kelvin ground connection to the channel 2 external current sense resistor, to be connected directly to the resistor's low side."
      },
      {
        "number": "22",
        "name": "PGND2",
        "type": "power_in",
        "description": "Power ground return for the channel 2 low-side gate driver, to be connected directly to the low side of the channel 2 current sense resistor."
      },
      {
        "number": "23",
        "name": "LO2",
        "type": "output",
        "description": "Low-side MOSFET gate drive output for the channel 2 synchronous MOSFET, routed through a short, low-inductance path; LO to AGND is limited to -0.3 V to VCC + 0.3 V."
      },
      {
        "number": "24",
        "name": "VCC2",
        "type": "power_in",
        "description": "VCC bias pin for channel 2; the datasheet limits VCC to 5.5 V to 14 V recommended and -0.3 V to 15 V absolute maximum to AGND."
      },
      {
        "number": "25",
        "name": "SW2",
        "type": "bidirectional",
        "description": "Buck switching node for channel 2, connected to the channel 2 bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain; SW2 to AGND is limited to -3 V to 75 V."
      },
      {
        "number": "26",
        "name": "HO2",
        "type": "output",
        "description": "High-side MOSFET gate drive output for channel 2, routed through a short, low-inductance path to the high-side gate; HO to SW is limited to -0.3 V to HB + 0.3 V."
      },
      {
        "number": "27",
        "name": "HB2",
        "type": "power_in",
        "description": "High-side bootstrap gate drive supply for channel 2, connected to the bootstrap diode cathode and bootstrap capacitor placed close to the controller; HB to SW is limited to 5.5 V to 14 V recommended and -0.3 V to 15 V absolute maximum."
      },
      {
        "number": "28",
        "name": "UVLO",
        "type": "input",
        "description": "Undervoltage lockout programming pin: below 0.4 V the regulator shuts down, 0.4 V to 1.25 V gives standby with no switching, and above 1.25 V enables switching with a 20-µA hysteresis current source; UVLO to AGND is limited to -0.3 V to 15 V."
      },
      {
        "number": "29",
        "name": "VIN",
        "type": "power_in",
        "description": "Supply voltage input for the VCC regulators; VIN is recommended at 5.5 V to 65 V, with a 75 V absolute maximum to AGND."
      },
      {
        "number": "30",
        "name": "HB1",
        "type": "power_in",
        "description": "High-side bootstrap gate drive supply for channel 1, connected to the bootstrap diode cathode and bootstrap capacitor placed close to the controller; HB to SW is limited to 5.5 V to 14 V recommended and -0.3 V to 15 V absolute maximum."
      },
      {
        "number": "31",
        "name": "HO1",
        "type": "output",
        "description": "High-side MOSFET gate drive output for channel 1, routed through a short, low-inductance path to the high-side gate; HO to SW is limited to -0.3 V to HB + 0.3 V."
      },
      {
        "number": "32",
        "name": "SW1",
        "type": "bidirectional",
        "description": "Buck switching node for channel 1, connected to the channel 1 bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain; SW1 to AGND is limited to -3 V to 75 V."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The Pin Functions table omits VCC1 and VCC2. Their numbers (1 and 24) are inferred from the top-view; The VCC1 and VCC2 pin types are not stated in the datasheet text. power_in is assigned here because ; The WQFN exposed thermal pad is not a numbered pin (the datasheet says it has no internal electrical",
          "exposed pad 33 added from the footprint"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0905,
        "at": "2026-10-08T03:38:46"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/lm5119",
        "pages": 44,
        "sha256": "bb3766da0f08d7d5",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
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        "units": "mm",
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lm5119psqe-etched.step",
        "role": "eda",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
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        "footprint_binding": "identity",
        "sha256": "e3772850ef247d61b01d602cbc1d627505f9ebafc2520b7bbdcad1be6a284118",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "WQFN-32-EP(5x5)",
      "Category": "Power Management (PMIC)",
      "Pins": "33"
    }
  },
  "variants": [],
  "sections": [
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    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "LM5119PSQE (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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