# LM5067MMX-2

**Texas Instruments** · Surge Protection Devices (SPDs) · MSOP-10

LM5067MMX-2 from Texas Instruments, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply input connected to system ground through a resistor, with a bypass capacitor to VEE; the VCC-to-VEE voltage is nominally 13 V, set by an internal zener diode. |
| 2 | UVLO/EN | input | Undervoltage lockout pin set by an external resistor divider from the system input; the enable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source, and it can be used for remote enable and disable. |
| 3 | OVLO | input | Overvoltage lockout pin set by an external resistor divider from the system input; the disable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source. |
| 4 | PWR | input | Power limit set pin; an external resistor here, together with the current sense resistor RS, sets the maximum power dissipation in the external series pass MOSFET. |
| 5 | VEE | power_in | Negative supply input connected to the system negative supply voltage, typically -48 V. |
| 6 | TIMER | bidirectional | Timing capacitor pin that sets the insertion time delay and fault timeout period, and also sets the restart timing of the LM5067-2. |
| 7 | SENSE | input | Current sense input measured from VEE across the sense resistor RS; if the voltage across RS reaches 50 mV the load current is limited and the fault timer activates. |
| 8 | GATE | output | Gate drive output that connects to the gate of the external N-channel MOSFET. |
| 9 | OUT | input | Output feedback pin connected to the external MOSFET drain, used internally to determine the MOSFET VDS for power limiting and to control the PGD output; the recommended operating range for OUT voltage above VEE is 0 to 80 V. |
| 10 | PGD | output | Open-drain power good output capable of sustaining 80 V when off; it switches high when the external MOSFET VDS falls below 1.23 V and switches low when VDS rises above approximately 2.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-10 |
| Category | Circuit Protection |
| Pins | 10 |

## CAD (KiCad official)

- Symbol: `LM5067MMX-2`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `lm5067mmx-2-etched.step` / `lm5067mmx-2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5067mmx-2.step` / `lm5067mmx-2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5067) (50 pp, sha256 `18e31f1abf9e0c9c`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lm5067mmx-2-datasheet.pdf)